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Wireless communications such as those in cell phones are utilizing increasing chip design complexity. For example analog mixed-signal chips can contain RF capability which requires integrated inductors [1,2]. High performance RF designs are enabled by the use of thick Copper (Cu) and Aluminum (Al) wires (>3um). In particular, the quality factor of the inductor, which is the ratio of magnetic stored energy over average dissipation, is dependent on the metal thickness. High quality factors, can be achieved by using thick Cu inductors. In some applications, the total thickness of Cu in the inductor can be as much as 12 um.
The fabrication of thick Cu layers is in many ways easier than that of thin Cu layers. For example, there are no limitations in terms of lithography or liner and seed layer thickness. However, there are still challenges with fabrication due to stress. Cracking of the dielectric can occur, due to the mismatch in coefficient of thermal expansion between Cu and SiO2, and due to the thick Cu layers in the inductor stack. Both the layout and the processing must be optimized to ensure that cracking does not occur.
This paper will discuss current applications, inductor design, and the reliability challenges and solutions associated with thick Cu interconnects.
To assess the reliability and validity of an FFQ to evaluate dietary patterns of Na consumption among low-income and low-literacy Brazilian hypertensive subjects.
The initial FFQ was submitted to content analysis with the pre-test administered to fifteen subjects. Reliability was evaluated according to the reproducibility criterion, with interviewer administration of the FFQ twice within a 15 d interval. Validity was assessed against a 24 h recall (132 subjects), a 3 d diet record (121 subjects) and a biomarker (24 h urinary Na; 121 subjects). To test the correlation with the biomarker, discretionary salt was added to the FFQ Na values.
A large urban teaching hospital in south-eastern Brazil.
The study was based on 132 randomly selected subjects (eighty-three women and forty-nine men) aged 18 to 85 years.
Kappa coefficients ranged from 0·79 to 0·98, confirming the reproducibility of the FFQ. There was no correlation between urinary Na excretion, the FFQ and the 24 h recall for the general sample, although significant correlations had been observed when methods were summed up (24 h recall + discretionary salt + FFQ; 0·32, P = 0·01). The addition of discretionary salt significantly improved the biomarker-based FFQ validity, with correlation coefficients varying from 0·19 (general sample) to 0·31 (female sub-sample).
The developed FFQ demonstrated satisfactory evidence of validity and reliability and can be used as an important complementary tool for the evaluation of Na intake among Brazilian hypertensive subjects.
The resistivities of as-deposited Cu(4.2Ir), Cu(2.0W), and Cu(2.2W) films are 32.2, 25.4, and 28.0 μΩcm, respectively. These resistivities are significantly higher thanthat for pure Cu films. After annealing the Cu(4.2Ir) film at constant heating rate to 800 °C and the two Cu(W) films to 950 °C, the resistivities reduce to 28.4, 4.3, and 5.2 μΩcm, respectively. The smaller reduction in resistivity for Cu(4.2Ir) compared with that for Cu(W) is partly a consequence of solute redissolution following precipitation. The variation of resistivity with temperature for the films and the Cu-rich end of the binary phase diagrams are used to categorize the decomposition behavior of the Cu(Ir) and Cu(W). These categories were defined by K. Barmak et al., J. Appl. Phys.87, 2204 (2000). W is placed in category III along with V, Nb, Ta, Cr, Mo, Re, Ru, Os, B, and C. Ir most suitably belongs to Category II together with Fe and Co.
The crystallinity and wet etching behaviors of ultrathin (<10 nm) HfO2 films grown by metal organic chemical vapor deposition (MOCVD) were examined as a function of deposition temperature, film thickness, and post-deposition annealing. Films 3 nm in thickness deposited at 400 or 500 °C were amorphous as-deposited and slowly etchable in aqueous HF; after annealing at 700 °C, the same films showed some nanocrystallinity and were impervious to HF. However, thicker films grown under the same conditions showed significant crystallinity and were impervious to HF even as-deposited. These observations, in combination with measurements on various samples etched back by an Ar+ ion damage/wet etch process, suggest a film structure comprising an initially amorphous near-interface region capped with a HF-resistant crystalline upper layer. It was found that the initially amorphous near-interface region (the bottom 1–3 nm) of films grown at 500 °C can be induced to at least partially crystallize as the upper part of the film starts becoming crystalline as-deposited, but that this near-interface region remains at least partially amorphous after annealing at 700°C.
Annealing of dilute binary Cu(Ti), Cu(In), Cu(Al), Cu(Sn), Cu(Mg), Cu(Nb), Cu(B), Cu(Co) and Cu(Ag) alloy films resulted in the strongest <111> fiber texture for Cu(Ti) and the lowest resistivity for Cu(Ag). The behavior of the alloy films was compared and contrasted with that for a pure evaporated Cu film. Electron beam evaporated films with compositions in the range of 2.0-4.2 at% and thicknesses in the range of 420-560 nm were annealed at 400°C for 5 hours. Two different approaches were used to derive volume fractions of texture components, namely fiber plots and orientation distributions. It is argued that for polytextured films such as the copper alloys studied here, orientation distributions derived from pole figures provide the most reliable basis for quantitative characterization.
We examine how the substrate temperature during Ti film sputter deposition influences the subsequent texture formation in TiSi2 thin films. Titanium films of 32 nm thickness were sputtered onto Si(001) at elevated substrate temperatures varying between 100 °C and 900 °C. After the depositions, in situ x-ray diffraction (XRD) measurements were performed to study the thin film reactions in real time, as the samples were annealed. The XRD results show that the substrate temperature significantly influences the texture of the initial Ti film as well as the texture of the resulting C54-phase TiSi2. The preferred Ti orientation gradually changes from (002) to (101) fiber texture as the deposition temperature increases up to 500 °C. Films deposited at 600 °C transformed into the C49 phase during deposition while films deposited at 700 °C and higher temperatures transformed into the C54 phase during deposition. The series of deposited films was annealed up to 1000 °C in He to complete the C54 phase formation while monitoring the texture evolution in situ using a position sensitive x-ray detector. The XRD results show that the final C54 phase texture changes from a dominant (311) orientation normal to the substrate to a (010) orientation for substrate temperatures between 600 °C and 700 °C. The C49-C54 phase transformation temperature is also lowered for these deposition temperatures. Ex situ pole figure analysis of the film deposited at 700 °C confirms the dominant C54 (010) texture and shows an in-plane orientation with C54  ∥ Si . For substrate temperatures between 800 °C and 900 °C, the C54 texture changes dramatically. In this case, θ - 2 θ scans do not show a preferred C54 orientation, but pole figure analysis indicates weak inplane orientations.
We have studied the formation of titanium silicides in the presence of an ultra-thin layer of Ta, interposed between Ti and Si. In-situ x-ray diffraction (XRD), resistance measurements and elastic light scattering were used to study the thin film reactions in real time during ramp anneals to 1000°C. On poly-Si substrates the Ta thickness was varied from 0 to 1.5 nm while the Ti thickness was held constant at ∼27 nm. The time-resolved XRD shows that the volume fraction of C40 and metal-rich silicide phases grows with increasing Ta layer thickness. Increased Ta layer thicknesses also delay the growth of the C49 disilicide phase to higher temperatures. Among the Ta thicknesses we examined, 0.3 nm is the most effective in lowering the C49-C54 transformation temperature. Films with Ta layers thicker than 0.5 nm do not completely transform into the C54 phase. The texture of the C54 phase is also sensitive to the Ta thickness. The C54 disilicide film is predominantly (010) textured for the Ti / 0.3 nm Ta sample. The final C54 texture is significantly different for Ta layers thinner or thicker than the optimal 0.3 nm. This suggests that the most effective thickness for lowering the C54 formation temperature is related to the development of a strong (010) texture. The possibility of a template effect by the C40 or metal-rich Ti5Si3 phases is also discussed on the basis of texture considerations.
Ta films were grown by plasma-enhanced atomic layer deposition (PE-ALD) at temperatures from room temperature up to 300 °C using TaCl5 as source gas and RF plasma-produced atomic H as the reducing agent. Post-deposition ex situ chemical analyses showed that the main impurity is oxygen, incorporated during the air exposure prior to analysis with typically low Cl concentration below 1 at %. The X-ray diffraction indicates that ALD Ta films are amorphous or composed of nano-grains. The typical resistivity of ALD Ta films was 150-180 μΩ cm, which corresponds to that of β-Ta phase, at a wide range of growth parameters. The conformality of the film is 100 % up to an aspect ratio of 15:1 and 40 % for aspect ratio of 40:1. The thickness per cycle, corresponding to the growth rate, was measured by Rutherford back scattering as a function of various key growth parameters, including TaCl5 and H exposure time and growth temperature. The maximum thickness per cycle values were below 0.1 ML, probably due to the steric hindrance for TaCl5 adsorption. Bilayer structures consisting of Cu films deposited by sputtering and ALD Ta films with various thicknesses were prepared and the diffusion barrier properties of ALD Ta films were investigated by various analysis techniques consisting of X-ray diffraction, elastic light scattering, and resistance analysis. The results were compared with Ta thin films deposited by sputtering with comparable thicknesses. Also, the growth of TaN films by PE-ALD using consecutive exposures of atomic H and activated N2 is presented.
We propose a modified self-aligned silicide (salicide) process that uses Ge implantation and a silicon cap to reduce the silicon substrate consumption by 75% as compared with a conventional salicide process. We have used Ge implants to increase the cobalt disilicide formation temperature. This forces the cobalt to react primarily with a deposited silicon cap, thus minimizing consumption from the silicon substrate. We expect this process to be useful for making silicide on shallow junctions and thin SOI films, where silicon consumption is constrained.
Annealing Cu and dilute Cu(Ti), Cu(Sn) and Cu(Al) alloy films resulted in the strengthening of film texture, with the strongest <111> fiber texture being found for Cu(Ti). Annealing also resulted in a decrease of electrical resistivity and the growth of grains, with the largest grain size and lowest resistivity being seen for pure Cu itself. Among the alloy films, the lowest resistivity was found for Cu(Ti) and the largest grain size for Cu(Al). Electron beam evaporated films with compositions in the range of 2.0-3.0 at% and thicknesses in the range of 420-540 nm were annealed at 400°C for 5 hours. Four point probe resistance measurement, xray diffraction and transmission electron microscopy were used to follow the changes in film resistivity, texture and grain size.
We discuss a modified self-aligned silicide (salicide) process that uses a silicon cap to reduce the substrate silicon consumption by 50% as compared with a conventional salicide process. We have used a metal-silicon mixture to form the metal-rich phase reliably in the first anneal. After etching the unreacted mixture we deposit a silicon cap. This forces the metal to react with the silicon cap as well as with the substrate during the second anneal, thus minimizing silicon consumption from the substrate. The unreacted portion of the silicon cap is selectively etched, leaving a structure with a raised source and drain. We expect this process to be useful for forming silicide on shallow junctions and thin SOI films, where silicon consumption is constrained.
High-epsilon (HE) and ferroelectric (FE) perovskites such as (Ba, Sr)TiO3 and SrBi2Ta2O9 are attracting substantial interest for use in dynamic random-access memory and nonvolatile memory. In this paper, we describe how an easily decomposable PdO bottom electrode layer may be used as a marker for possible HE/FE damage induced by exposure to reducing environments. Oxygen loss from PdO films with and without a HE/FE overlayer was monitored by in situ x-ray diffraction during heating in an inert ambient. Additional measurements were performed on PdO films in contact with Pt underlayers. A Pt underlayer was found to reduce the temperature of oxygen release from PdO, suggesting that it may be possible to custom-design PdO-based oxygen sources with specific oxygen release characteristics to resupply the HE/FE with oxygen lost during processing.
We have demonstrated that the optimum Ta–Si–N compositions for use as oxygen diffusion barriers in stacked-capacitor dynamic random-access memory structures with perovskite dielectrics are in the range Ta(20–25 at.%)–Si(20–45 at.%)–N(35–60 at.%). Twenty-two different Ta–Si–N compositions were evaluated, starting from six sputter-deposited Ta–Si alloys of which four were reactively deposited in 2–8% nitrogen in an argon plasma. The barriers were evaluated after an aggressive 650 °C/30 min oxygen anneal to determine if they remained electrically conductive, prevented oxygen diffusion and formation of low dielectric constant oxides, and had minimal interaction with the Pt electrode and underlying Si plug. Rutherford backscattering spectroscopy, four-point probe sheet resistance, through-film-resistance, and x-ray diffraction analysis techniques were used in the evaluation.
The biaxial stress in Co thin-films has been investigated in situ by measuring changes in substrate curvature that occurred during deposition and annealing.Films of Co, 35 to 500 nm in thickness, were deposited by UHV magnetron sputtering at room temperature on Si (100) and poly-Si substrates.Results show that during Co deposition the bending force increased linearly with film thickness; a signature of constant stress.In addition, the stress evolution during silicide formation was measured under constant heating rate conditions from room temperature up to 700°C. The stress-temperature curve was correlated with Co2Si, CoSi, and CoSi2 phase formation using in situ synchrotron X-ray diffraction measurements.The room temperature stress for the CoSi2 phase was found to be ∼0.8 GPa (tensile) in the films deposited on Si (100) and ∼1 GPa (tensile) on the films deposited on poly-Si.The higher tensile stress in the poly-Si sample could be a result of Si grain growth during annealing.
Materials requirements for electrodes and barriers in high density dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM) are reviewed, and some approaches to barrier materials and device geometries are described. Electrode/barrier topics covered in more detail include Pt reactivity with Si-containing barriers and dielectric overlayers, the application of a Bragg-Brentano x-ray diffraction technique to quantitatively probe Pt and Ir electrode morphology and thickness changes during ferroelectric processing, the stability of metal oxide electrode materials in reducing ambients, electrode patterning techniques (including Pt electroplating), and electrical properties of 3-D capacitors in 256k arrays as a function of top electrode annealing treatments.
The mechanisms are studied for enhanced formation of C54–TiSi2 at about 700 °C when rapid thermal annealing at 3 °C/s in N2 is performed on 32-nm-thick codeposited Ti–5.9 at.% Ta on Si(100) single-crystal substrates. The enhancement is related to an increased C54–TiSi2 nucleation rate due to the development of a multilayered microstructure. The multilayer microstructure forms at temperatures below 600 °C with the formation of an amorphous disilicide adjacent to the Si substrate and a M5Si3 (M = Ti, Ta) capping layer. This amorphous disilicide crystallizes at higher temperatures to C49–TiSi2. The multilayer microstructure introduces an additional interface that increases the area available for the heterogeneous nucleation of C54. The capping layer is identified as hexagonal Ti 5Si3 or its isomorphous compound (Ti1–xTax)5Si3. Crystal simulations demonstrate that C54(040) has a lattice mismatch of 6–7% relative to Ti5Si3(300) suggesting that a pseudomorphic epitaxial relationship may lower the interfacial energy between these two phases and reduce the energy barrier for C54 nucleation. A C40 disilicide phase was also observed at temperatures above that required to form C54–TiSi2 suggesting that, in the present experiments, the C40 phase does not play a major role in catalyzing C54 formation.
Aluminum-tantalum bilayers have been investigated for their potential to serve as conductive barriers to oxygen diffusion when annealed at conditions corresponding to crystallization of perovskite dielectrics such as lead lanthanum titanate (PLT). Ta (50 nm)/Al (15 nm) structures have been deposited on Si substrates and annealed in oxygen at 650 and 700 °C for various amounts of time. The as-deposited and annealed structures have been characterized by x-ray diffraction (XRD), Rutherford backscattering spectroscopy (RBS), and Auger electron spectroscopy (AES) analysis and by four-point probe electrical measurements. It has been found that the Al–Ta structures can withstand complete oxidation when exposed to oxygen at 650 °C for 30 min or 700 °C for 1 min and the oxide layer formed at the surface of the structure acts as a barrier to further oxygen diffusion. When a PLT film was deposited directly on the Al–Ta structures intermixing took place. It was therefore necessary to insert a Pt layer between the Al–Ta barrier and PLT layer. In such a case the PLT showed electrical properties similar to those obtained when deposited on SiO2/Pt; however, the Al–Ta structure did interact with Pt during the perovskite formation anneal. It has been found that this interaction can be prevented by preannealing the Al–Ta, in oxygen, prior to the deposition of Pt.
TaSiN films deposited as layered TaN–SiN structures of various compositions have been examined for their oxidation resistant properties during annealing in oxygen at annealing conditions commonly used to prepare perovskite dielectrics. The films have been characterized by Rutherford backscattering analysis (RBS), x-ray diffraction (XRD), and electrical resistivity measurements. Films with less than 15 at.% Si showed some resistance to oxidation after annealing for 1 min at 650 °C but became fully oxidized after longer anneals. Increasing the Si content up to 28 at.% increasingly improved the oxidation resistance of the alloys to the point where the films resisted complete oxidation for up to 5 min at 700 °C. For alloys with greater than 28 at.% Si, no oxidation could be detected by RBS or electrical measurements for anneals up to 5 min at 700 °C. Furthermore, these high Si content alloys were still conductive with resistivities of near 1000 μΩ cm. It was also found that TaSiN and lead lanthanum titanate (PLT) interact strongly during annealing, and another nonoxidizing barrier metal, such as Pt, is required between the two materials if TaSiN is to be used as an electrode/barrier with lead-based perovskites.
We present a model which accounts for the dramatic evolution in the microstructure of electroplated copper thin films near room temperature. Microstructure evolution occurs during a transient period of hours following deposition, and includes an increase in grain size, changes in preferred crystallographic texture, and decreases in resistivity, hardness and compressive stress. As the grain size increases from the as-deposited value of 0.05–0.1 μm up to several μm, the decreasing grain boundary contribution to electron scattering lowers the resistivity by tens of percent to near-bulk values. Concurrently, as the volume of grain boundaries decreases, the stress is shown to change in the tensile direction by tens of MPa. The as-deposited grain size is also shown to be consistent with grain boundary pinning.
Electroplated Cu was found to have a fine as-plated microstructure, 0.05 ±0.03 μm, with multiple grains through the film thickness and evidence of twins and dislocations within grains. Over time at room temperature, the grains grew to greater than 1 μm in size. Studied as a function of annealing temperature, the recrystallized grains were shown to be 1.6 ± 1.0 μm in size, columnar and highly twinned. The grain growth was directly related to the time dependent decrease in sheet resistance. The initial grain structure was characterized using scanning transmission electron microscopy (STEM) from a cross-section sample prepared by a novel focused ion beam (FIB) and lift-out technique. The recrystallized grain structures were imaged using FIB secondary electron imaging. From these micrographs, the grain boundary structures were traced, and an image analysis program was used to measure the grain areas. A Gaussian fit of the log-normal distribution of grain areas was used to calculate the mean area and standard deviation. These values were converted to grain size diameters by assuming a circular grain geometry.