Various metals with different galvanic potentials are used to fabricate the microelectronic circuits. One of the most commonly used processes during integrated circuit manufacturing is the tungsten via fill. To obtain maximum interconnect density with low via resistance requires that metal-via overlap is essentially zero. Zero overlap with litho variations and thus misalignment may result in unlanded vias. Since the vias are used to connect various metal levels, a large number of these cases may occur causing device failures and thus yield loss. To study this problem a variety of test structures were studied and a new mechanism of corrosion was found. The tungsten corrosion observed in these structures was found to be photo-induced. In this paper we will discuss the mechanism of photoinduced galvanic corrosion that occurs between the aluminum and tungsten metal layers during microelectronic manufacturing.