We demonstrate the feasibility of a Ta2O5-based metal-insulator-metal (MIM) capacitor module which is integrated into the backend-of-the-line of a 0.5 μm CMOS process flow. The demonstration utilizes 6-inch wafers, sputtered Ta2O5 films with TaN and TiN electrodes, reactive ion etch (RIE) processes for defining the capacitor stack, and a metallization scheme which uses hot Al(Cu) and W plugs and a standard forming gas anneal (N2-5% H2). Acceptable electrical properties have been achieved within these processing constraints for the integrated MIM capacitor module, including specific capacitance (C/A) and leakage current density (J) of ≥ 5 fF/μm2 and ≤ 1 pA/pF-V, respectively. In addition, we compare the fundamental properties of the Ta2O5 dielectric with literature reports and point out that leakage mechanisms must be analyzed with care due to significant dielectric relaxation in the films under certain processing/measurement conditions. For the baseline integrated films, we confirm that leakage is most consistent with a Poole-Frenkel mechanism.