A concurrent-engineering approach is applied to the development of an axisymmetric rapidthermal- processing (RTP) reactor and its associated temperature controller. Using a detailed finite-element thermal model as a surrogate for actual hardware, we have developed and tested a multiinput multi-output (MIMO) controller. Closed-loop simulations are performed by linking the control algorithm with the finite-element code. Simulations show that good temperature uniformity is maintained on the wafer during both steady and transient conditions. A numerical study shows the effect of ramp rate, feedback gain, sensor placement, and wafer-emissivity patterns on system performance.

A Universal Thermal Module™ (UTM™) has been developed for vacuum-integrated cluster RTP and MOCVD as well as stand-alone atmospheric RTP applications. The UTM™ architecture provides highly modular RTP and MOCVD tool configurations for various single-wafer thermal processes. The UTM™ design comprises a temperature-controlled UHV-grade process chamber as well as an ultraclean gearless wafer rotation assembly for improved temperature uniformity and enhanced built-in reliability. The UTM™ RTP employs bottom/backside wafer heating using a multi-zone axisymmetric illuminator and a reflective multi-zone gas showerhead located above the wafer. Precision RTP control is achieved using a multi-zone controller in conjunction with a multipoint sensor system with real-time multi-zone compensations for wafer emissivity and illuminator light interference effects. The RTP temperature measurement and control techniques fully compensate for any axisymmetric or non-axisymmetric wafer emissivity patterns, eliminating the need for pre-RTP wafer backside conditioning. The UTM™ showerhead provides capabilities for ultraclean multi-zone gas injection and in-situ RF plasma for MOCVD and RTCVD processes. The UTM™ MOCVD module meets the most stringent specifications and tool parameters for various metallization and high-K dielectric deposition applications. This module has been used for deposition of low-resistivity copper films with excellent void-free sub-half-micron gap fill for high-performance multilevel interconnects. The UTM™ RTP and MOCVD modules have been implemented based on design optimizations in a virtual reactor environment.

The insertion of single-wafer thermal and CVD technologies into the front- and back-end of the line processing starts with study of the integrated circuits manufacturing and device performance requirements. Relying upon the lessons learned and using the concurrent engineering approach, next generation processing equipment design architecture is then defined. In order to meet the process performance, throughput, and cost of ownership requirements of semiconductor IC manufacturing as defined in the SIA road map, heavy emphasis must be put on sensor fusion and model-based process control. In the existing semiconductor IC manufacturing equipment, process control is usually accomplished by control of equipment settings, qualification wafer runs and ex-situ measurements of the various wafer properties, as well as design architecture for stable equipment performance. The conventional approach, however, suffers from slow drifts of various equipment state parameters such as infrared absorbing quartz media causing thermal memory effects, or deposition of films on the reactor walls causing variation in the optical characteristics of the reactor as well as chemical and particle memory effects. Using model-based real-time control in conjunction with implementation of various in-situ and ex-situ sensors, these effects can be well monitored and controlled. This paper is to discuss various production related issues with single-wafer thermal and CVD technologies.

Various ultrathin gate and capacitor structures were formed in a single wafer, lamp heated, reduced pressure, cold wall CVD reactor. Sequential processes including in-situ rapid thermal cleaning, surface passivation, and dielectric formation for capacitor structures was achieved at reduced pressure using pure ammonia. Three types of dielectric films were fabricated: pure thermal oxide, oxynitride, and silicon nitride. The films were grown using pure dry oxygen, nitrous oxide, and silane/ammonia chemistries, respectively. Excellent uniformity across the wafer was observed for dielectric films of different thicknesses. The RTCVD-based films exhibited improved characteristics for leakage and device drive. The TDDB data indicates that the short and long term reliability of the gate and capacitor dielectric films formed with the singlewafer process was better than that obtained with furnace-grown films. Auger electron spectroscopy and ellipsometry techniques were used to correlate film composition with processing conditions. In this paper we present the growth kinetics, composition, and thickness uniformity data and the electrical results of single-wafer processing.

Rapid Thermal Chemical Vapor Deposition (RTCVD) of undoped and insitu doped polycrystalline silicon films has been accomplished in a cold-wall reactor. Dichlorosilane was used for the silicon source and AsH3 gas was used as the dopant source. Thedeposition kinetics of poly-silicon films on silicon dioxide over a range of deposition temperatures, pressures and carrier gas chemistries was studied. Both blanket and selective deposition modes were examined. The poly-silicon films were examined by scanning electron microscopy (SEM) and transmission electron microscopy (TEM) for morphology and grain size analysis. Using X-ray diffraction technique, preferred grain orientation dependency of poly-silicon films on growth conditions was investigated. Dopant incorporation, dopant activation and oxygen content of polysilicon films were measured by secondary ion mass spectrometry (SIMS), four point probe, and spreading resistance profiling (SRP) techniques.

This paper is to report the results of material characterization of polysilicon films deposited by RTCVD, and to address the applications and advantages of ‘Integrated Processing’ technology involving deposition of polysilicon.

Electrical properties of thin (12 nm) SiO2 films with and without in-situ deposited poly Si electrodes have been studied. Thin SiO2 films were grown by the rapid thermal oxidation (RTO) process and the poly Si films were deposited by the rapid thermal chemical vapor deposition (RTCVD) technique at 675°C and 800°C. Good electrical properties were observed for SiO2 films with thin in-situ poly Si deposition; the flatband voltage was ∼ -0.86 V, the interface state density was < 2 × 1010/cm2/eV, and breakdown strength was > 10 MV/cm. The properties of RTCVD poly Si were also studied. The grain size was 10-60 rim before anneal and was 50-120 rim after anneal. Voids were found in thin (< 70 nm) RTCVD poly Si films. No difference in either SiO2 properties or poly Si properties was observed for poly Si films deposited at different temperatures.

A new technique of post-oxidation annealing has been introduced to improve the properties and long term reliability of ultrathin (<100 Å) MOS gate dielectrics. In this technique, after oxidation, nitridation is done in NH3 followed by a light reoxidation in O2 and then an inert anneal in Ar or N2. Using this technique both optimum performance as well as reliability can be obtained without sacrificing either. NH3 anneal of SiO2 improved the hot electron immunity, but degraded the interface quality. Good properties could be obtained by a strong reoxidation of the nitrided films, however, at the expense of a substantial increase in the film thickness. Nitrogen and argon ambients were found to be equally effective at improving film properties. By annealing the film in an inert ambient following reoxidation of the nitroxide, fixed charge can be further decreased with little oxide grown, electron mobility in NMOS FETs increases further, and the hot electron lifetime is much longer than that of the starting oxide.

Rapid thermal oxidation (RTO) of Si using transient linearly-ramped-temperature saw-toothed (LRT-ST) and triangular (LRT-TA) thermal cycles has been examined through evaluations of the process uniformity, slip dislocation patterns, and electrical characteristics of MOS devices. The strong effects of the thermal cycle parameters on process uniformity and slips indicate that the overall performance of an RTP tool must be specified both under the steady-state and transient thermal cycles. The electrical characteristics of MOS devices with LRT-grown gate oxides are comparable to those for devices with oxides grown by the trapezoidal thermal cycles.

Rapid thermal nitridation (RTN) of metastable Ti silicide in pure ammonia ambient has been shown to result in the formation of a bilayer TiSi 2'TiN structure. This bilayer structure provides an effective self-aligned diffusion barrier against aluminum spiking. Further, the simultaneous formation of TiN on top of the TiSi2 preserves the low resistivity of the silicide layer upon subsequent high temperature process steps. Rutherford backscatttering spectroscopy, Auger electron spectroscopy and four point probe techniques were used to analyze the stoichiometry of the nitrided layer, and to study the kinetics of the nitridation reaction. The nitridation of the metastable silicide film is a substitutional eaction which begins at the surface of the silicide and progresses by substituting nitrogen atoms for silicon. The nitrogen atoms result from dissociation of ammonia The released silicon atoms then diffuse to the silicide'silicon interface and deposit in an epitaxial manner. The benefits of the proposed metallization scheme are substantiated by electrical characterization of the bilayer structure in comparison with a conventional process.