The rate-determining process in dry oxidation of silicon for thicker oxides (say above 10 nm) is probably the interstitial diffusion of oxygen molecules. For thinner oxides (a few nm), this simple picture is inadequate. The Deal-Grove model of oxidation kinetics fails. Oxide usually grows by an essentially layer-by-layer process, with growth at terraces, not steps, and perhaps oscillatory roughening. Isotope experiments show that interstitial and network oxygens exchange close to the Si/oxide interface and close to the oxide/gas interface. These results imply limiting mechanisms other than diffusion, probably involving charged oxygen species. We have made Density Functional (DFT) Generalised Gradient Approximation (GGA) calculations for a range of neutral and charged oxygen species to assess relative stabilities, diffusion mechanisms, and propensity for isotope exchange. These results identify acceptable mechanisms. We have also used Monte-Carlo methods to examine the consequences of the image interaction bias, and also the effects of the charge transfer processes (like tunnelling) by which charged species form. We comment on implications for oxide quality, especially on the relationship between growth processes and the charge and energy localisation components of breakdown.

Z-contrast imaging and electron energy-loss spectroscopy with a spatial resolution at the atomic scale provide evidence of an atomically abrupt Si-SiO2, interface. Th micrographs revealed no indication for an interface layer of crystalline oxide at this thermally grown interface. Theoretical ab-initio calculations of two different interface structures showed that even in the most ideal interface the local density of states extends into the region of the oxide band gap. The O-K energy-loss near-edge structure was simulated for both interface models. The comparison of theoretical and experimental results of the O-K near-edge structure agreed and showed that states below the conduction band of the oxide are caused by the dimer-like SiO-Si bridges present in all structural models.

Optimized electron spin resonance investigation resulted in the observation of the fuill angular dependence of the hyperfine (hi) spectra of the Pb1 interface defect in thermal (100)Si/SiO2, showing that the dominant hf interaction of the associated unpaired electron arises from a single Si site. The defect is identified as a prototype Si dangling bond defect with, much remarkably, the unpaired sp3-orbital pointing closely along a <211> direction at 35.26° with the [100] interface normal. If O is excluded as an immediate part of the defect, the key part of the Pb1 defect is uncovered as a tilted Si3≡Si unit. The incorporation of this defect kernel into a larger defect structure is analyzed within the framework of theoretical insight, suggesting the moiety to be part of a strained interfacial Si-Si dimer. ESR has been combined with electrical measurements to monitor the defect's behavior under thermal treatment, including postoxidation annealing in various ambients. No electrical activity of Pb1 as a detrimental interface trap could be traced, suggesting the defect to be of little relevance for device performance. The results are reviewed and discussed in the light of the defect's characteristic appearance at the (100)Si/SiO2 interface.

The interface state densities near the midgap were measured with the progress of oxidation of atomically flat Si(100) surface. It was found that the interface state distribution in Si bandgap changes periodically with the progress of oxidation. Namely, the interface-state density near the midgap of Si exhibits drastic decrease at oxide film thickness where the surface roughness of oxide film takes its minimum value, while that does not exhibit decrease at the oxide film thickness where the surface roughness takes its maximum value. In order to minimize interface state densities the oxide film thickness should be precisely controlled to within an accuracy of 0.02 nm.

The defect states due to the Si dangling-bonds at the Si(100)/SiO2 interface is investigated by employing the first-principles method based on the density functional theory. Two prototypes of the defects at the interface are considered. One exists on one end of a Si-Si dimer. On the other hand, the other exists on an edge of a Si-O-Si bridge. The electronic structures for these systems were calculated to investigate the interface states. For the former, two defect states strongly localizing on the silicon dangling bond at the interface appear in the band gap. The latter defect also generates two defect states. But the upper level is in the conduction band, while the lower level is in the band gap. It is also shown that the interface states completely disappear by introducing a H atom into the interface and terminating the dangling bonds. Our results suggest the silicon dangling-bond on a Si-Si dimer with no adjacent O atoms as a candidate for the Pb1 center.

Atomic force microscopy has been used to study the morphology of the oxide surface and the Si-SiO2 interface after oxidation of Si(111) surfaces that are either totally free of atomic steps or have well characterized low step density. The step-free areas were formed by thermally processing a patterned Si surface in which flat areas are enclosed by a square array of ridges; flow of the atomic steps into the surrounding ridge barriers produces a regular array of step-free areas each of which can be up to ∼50µm×50µm. Arrays of widely spaced steps (e.g. 5µm) can also be produced in the step-free areas. AFM scans of the same areas were taken prior to (dry) oxidation, after oxidation, and after chemical removal of the oxide. It was found that at an oxide thickness in the 5-13nm range, the initial step structure of the underlying Si substrates is translated through the oxide to the surface after oxidation with the oxide surface being somewhat rougher than the initial substrate. Furthermore, the initial step morphology of the substrate remains at the Si-SiO2 interface after etching away the oxide by HF. The interface roughness is less than that of the oxide surface. The results suggest that the initial oxidation of silicon proceeds in a ‘layer by layer’ manner and not through a preferential step-flow oxide growth mode.

Si 2p core-level spectroscopy is a unique tool to determine the chemical composition and spatial extension of the suboxide layer present at the Si/SiO2 interface. In the case of ultra-thin oxide films (thickness <10 Å), the high surface sensitivity provided by the tunability of synchrotron radiation allows the observation of four energetically well-separated oxidation states, generally attributed to a silicon atom with an increasing number of oxygen first neighbors, and hence often denoted Sin+(with n=1,…,4). After a brief review of two decades of XPS studies on the Si/SiO2 interface, we give an account of the recent debate concerning the possible contribution of the second oxygen neighbor shell to the chemical shift, which, if effective, would modify the picture of the interface. Then, we examine the benefit derived from the use of very high energy resolution (70 meV at hv=130 eV), and we try to determine, for this system, what are the limits of this spectroscopy. To illustrate the latter point, among various case studies (thermal oxides, room temperature adsorption etc.), we treat in more detail the case of the H-terminated Si(1 11) surface oxidized by atomic oxygen, and discuss our data in the light of previous XPS and vibrational spectroscopy studies.

Precise characterization of nitride/oxide gate structures becomes a challenging task due to the very thin thickness (<3-4nm), which will be needed in the next generation integrated circuits. Conventional techniques such as spectroscopic ellipsometry in the visible range becomes difficult to apply because of the great correlation between thickness and optical indices. To overcome this problem the following strategy is applied. First, grazing x-ray reflectance is used on all the samples to extract the different layer thicknesses using a simple model. Second, spectroscopi ellipsometry from deep UV 190nm to 850nm is applied and the results fitted with the structural models deduced from the x-ray results. In this conditions the nitrogen content of the films can be precisely determined. This kind of analysis has been made on a series of nitride/oxide gate structures with variable thicknesses and degree of nitridation. Regression results are discussed and compared to x-ray photoemission results obtained on the same samples.

With the downscaling of the electronic devices and the increase in the frequency of the electronic circuits, a large search for new gate dielectric is ongoing. The exact composition and element distribution in the dielectric film have a large impact on the electrical characteristics of these films. We studied here the formation of ultrathin Si3N4 films (3 nm) under different conditions and concentrated on their composition analysis. The Si substrates were cleaned using RCA and/or HF dip. The Si3N4 films were subsequently fabricated either by RTCVD (SiH4/NH3) either by remote plasma (SiH4/N2) with or without a pre-anneal to form a 0.5 nm SiO2 layer. Post annealing was made using NO, N2O or NH3 at various temperatures and for various times. The quantification of the composition was realized using XPS and elemental distribution was analyzed using TOFSIMS with Ar+ sputtering and positive ion detection mode.

The results show that the fabrication method of the nitride film has only a very limited influence on the O/N content of the films. However, both the preparations of the substrate (HF last or RCA last) and the post-annealing influence strongly the film composition. The presence of an interfacial oxide increases significantly the oxygen content of the film. Post-annealing with N2O also increases the oxygen content of the film while the NH3 post-annealing leads to a significant decrease. The results are compared with electrical characterization of the same films.

Ultra-thin tantalum pentoxide (Ta2O5) layers of thicknesses ranging from 6 to 10 nm were deposited by low pressure chemical vapor deposition from Ta(OC2 H5)5 on rapid thermal nitrided silicon substrates. Films were annealed in UV-O3 at 450°C, in dry O2 at 750°C or by using a combination of these two treatments. The physico-chemical properties were studied by TEM and SIMS. Results showed an oxidation of the interfacial region during annealing. The C and H contaminants are reduced during the O2 post-deposition treatment, and this step may also lead to a modification of the chemical state of C in Ta2O5. Both capacitance-voltage and current-voltage measurements were performed on Al/Ta2O5/Si structures. Excellent electrical properties were recorded: high dielectric constant (between 14.8 and 19 in the case of the double step annealing, which corresponds to an equivalent SiO2 thickness ranging from 2.0 to 2.3 nm), low leakage current densities (close to 5×10−9 A.cm−2 @ 1MV.cm−1) and promising long-term reliability.

HfO2 is the one of the potential high-k dielectrics for replacing SiO2 as a gate dielectric. HfO2 is thermodynamically stable when in direct contact with Si and has a reasonable band gap (∼5.65eV). In this study, MOS capacitors (Pt/HfO2/Si) were fabricated by depositing HfO2 using reactive DC magnetron sputtering in the range of 33∼135Å followed by Pt deposition. During the HfO2 deposition, O2 flow was modulated to control interface quality and to suppress interfacial layer growing. By optimizing the HfO2 deposition process, equivalent oxide thickness (EOT) can be reduced down to ∼11.2 Å with the leakage current as low as 1X10−2 A/cm2 at +1.0V and negligible frequency dispersion. HfO2 films also show excellent breakdown characteristics and negligible hysteresis after high temperature annealing. From the high resolution TEM, there is a thin interfacial layer after annealing, suggesting a composite of Si-Hf-O with a dielectric constant of ≈ 2 X K SiO2.

Materials with a high dielectric constant (K) such as tantalum pentoxide (Ta2O5) and barium strontium titanate (BST) are needed for insulators in dynamic random access memory capacitors and as gate dielectrics in future silicon devices. The band offsets of these oxides must be over 1 eV for both electrons and holes, to minimise leakage currents due to Schottky emission. We have calculated the band alignments of many high K materials on Si and metals using the method of charge neutrality levels. Ta2O5 and BST have rather small conduction band offsets on Si, because the band alignments are quite asymmetric. Other wide gap materials Al2O3, Y2O3, ZrO2 and ZrSiO4 are found to have offsets of over 1.5 eV for both electrons and holes, suggesting that these are preferable dielectrics. Zirconates such as BaZrO3 have wider gaps than the titanates, but they still have rather low conduction band offsets on Si. The implications of the results for future generations of MOSFETs and DRAMS are discussed.

A common theoretical framework is presented to model the conduction characteristics of the two main dielectric breakdown modes in ultrathin SiO2 gate oxides, namely the soft and hard breakdown modes. The breakdown paths are considered to behave as mesoscopic quantum point contacts so that the conduction properties are controlled by energy funneling effects. An adiabatic approach to the modelling of these quantum point contacts is adopted to obtain an analytical approximation for the total transmission coefficient. In the limit of small breakdown spot areas, tunneling through a potential barrier associated with the lower electron transversal state at the narrowest part of the constriction explains the soft breakdown characteristics. For larger areas, such a barrier dissapears and conductance quantization is predicted. Experimental results are well explained by the model, including the conductance values after the hard breakdown and the oxide thickness independence of the current-voltage characteristic after the soft breakdown.

In this work, we report the link between the primary hot hole and Fowler Nordheim (FN) electron injections in oxide breakdown mechanism. A simple breakdown model is established. The experimental method is carefully designed to measure the primary hot hole fluence and FN electron fluence separately and accurately. The calculation based on our model is in very good agreement with our experiments. Oxide breakdown is stimulated by a combined effect when the sum of the trap density Dpri activated by primary hot hole injection and the trap density Dn activated by FN electron injection reaches a critical value Dcri. The hole is two orders of magnitude more effective than FN electron in causing breakdown. Since primary hot hole injection may occurs under many realistic device operation in the circuit, existing oxide lifetime projected from conventional TDDB measurement by only applying FN stress is overestimated in many cases. The model demonstrated in this work lays the groundwork in approaching a more appropriate way for predicting the oxide reliability and lifetime.

The quasi-breakdown (QB) in ultra thin gate oxide is investigated through the observation of defect generation during high field F-N stress and substrate hot hole and hot electron stresses. The interface trap density increases during stress and reaches to a same critical amount at the onset point of QB regardless of stress current density and stressing carrier type. The experiments also show that hot carriers are much more effective to trigger QB than F-N electrons at the same current level. This can be ascribed to the fact that hot carrier has much higher interface state generation rate than F-N electron does. All results consistently support the interface damage model for the QB occurrence.

The conduction mechanism of quasi-breakdown (QB) for ultra-thin gate oxide has been studied in dual-gate CMOSFET with a 3.7 nm thick gate oxide. Systematic carrier separation experiments were conducted to investigate the evolutions of gate, source/drain, and substrate currents before and after gate oxide QB. Our experimental results clearly show that QB is due to the formation of a local physically-damaged-region (LPDR) at Si/SiO2 interface. At this region, the effective oxide thickness is reduced to the direct tunneling (DT) regime. The observed high gate leakage current is due to DT electron or hole currents through the region where the LPDR is generated. Under substrate injection stress condition, there is several orders of magnitude increase of Isub(Is/d) at the onset point of QB for n(p) - MOSFET, which mainly corresponds to valence electrons DT from the substrate to the gate. Consequently, cold holes are left in the substrate and measured as substrate current. Under gate injection stress condition, there is sudden drop and even change of sign of Isub(Is/d) at the onset point of QB for n(p)-MOSFET, which corresponds to the disappearance of impact ionization and the appearance of hole DT current from the substrate to the gate. In the LPDR region, the damaged structure may have two or multi metastable states corresponding to different effective oxide thickness. The thermal transition between two or multi metastable states leads to random telegraph switching noise (RTSN) fluctuation between two or multi levels.

In this paper we carefully investigate the correlation between gate induced drain leakage current and plasma induced damages in the deep submicron p+ polysilicon gate pMOSFETs with gate oxide thickness of 50 Å. Low field enhancement of gate induced drain leakage current caused by plasma charging damage is a function of metal 1 antenna area/length ratio and cell location. Combined with the charge pumping measurements, it is found that gate induced drain leakage current enhancement is mainly due to the plasma induced interface traps. A linear relationship between the gate induced drain leakage and the plasma induced interface trap density is observed within the experimental error. On the other hand, the threshold voltage measurements show that oxide trapped charge has no major contribution to, and no correlation with, the gate induced drain leakage current for thin gate oxide MOSFET devices.

We have examined the effects of reverse biased floating voltage at the source and drain junctions during constant current high-field electron injection on the performance of NMOSFETs. Device parameter degradation was studied when electrons were injected from both gate and substrate. Hole trapping and electron trapping (observed from threshold voltage degradation) were found to be enhanced with reverse biased floating voltage for devices subjected to substrate injection. On the other hand, damages in the devices subjected to gate injection were found to be minimal dependent on reverse biased voltage. Increase in current density due to reduction in effective channel length is believed to be the cause of modified device characteristics. Transconductance degradation for both substrate injection and gate injection was found to have minimal dependence on reverse biased voltage. An asymmetry in the distribution of electron traps at the gate-oxide and substrate-oxide interfaces was observed.

We have confirmed that grain boundaries are related to leakage problems in Ta2O5/SiON capacitors for high dielectric DRAMs. XRD studies using an intensity ratio of (200) to (001) showed that the crystallographic structure of Ta2O5 film was strongly dependent on preparation conditions. As the (200) oriented grains grew faster than the other grains, it became important to control its grain growth in forming uniform grain boundaries. TEM observation has shown that Ta2O5 film with a high intensity ratio of (200) to (001) was made up of large size grains and had SION interface intruding into grain boundaries. By using the current-mode AFM, we could monitor leakage current directly through grain boundaries on Ta2O5 film.

Bismuth titanate thin films have been prepared on silicon by metalorganic decompositionMOD) technique with bismuth nitrate and titanium butoxide as source materials. The growth procedure of the Bi2Ti2O7 thin films is discussed in this paper. The surface morphology of the Bi2Ti2O7 film was investigated by using Electric Force Microscope (EFM), and the crystallization of the films was studied by x-ray diffraction (XRD). Bismuth titanate thin film prepared on (100) silicon substrate showed strong (111) orientation. Its dielectric properties and the current-voltage (I-V) characteristics were measured. The dielectric constant of the Bi2Ti2O7 thin films vs. frequency, in the temperature range of 100-800 °C, were studied. The dielectric constant and the dielectric loss for Bi2Ti2O7 are 118 and 0.07 respectively at 100KHz. For the Bi2Ti2O7 films with 0.4µm in thickness annealed at 580 °C for 40 minutes, their leakage current density is 4.06×10−7 A/cm2 at an applied voltage of 15V.

The ferroelectric phase transition has been observed distinctly and the Curie temperature was determined for the Bi2Ti2O7 ceramic films. Capacitance vs. temperature was measured from 27-800 at 1KHz, 100KHz, 100KHz and 1MHz.