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Three-Dimensional Integration Technology for Advanced Focal Planes
Published online by Cambridge University Press: 01 February 2011
Abstract
We have developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circuit wafers. This paper describes the 3D technology and discusses some of the advanced focal plane arrays that have been built using it.
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- Research Article
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- Copyright © Materials Research Society 2009
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