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Sub-30 nm FinFETs with Schottky-Barrier Source/Drain Featuring Complementary Metal Silicides and Fully-Silicided Gate for P-FinFETs

Published online by Cambridge University Press:  01 February 2011

Rinus Tek Po Lee
Affiliation:
rinuslee@ieee.org, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Kian-Ming Tan
Affiliation:
g0402599@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Tsung-Yang Liow
Affiliation:
g0301490@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Andy Eu-Jin Lim
Affiliation:
g0404227@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Guo-Qiang Lo
Affiliation:
logq@ime.a-star.edu.sg, Institute of Microelectronics, 11 Science Park, Singapore, 117685, Singapore
Ganesh S. Samudra
Affiliation:
eleshanr@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Dong-Zhi Chi
Affiliation:
dz-chi@imre.a-star.edu.sg, Institute of Materials Research and Engineering, 3 Research Link, Singapore, 117602, Singapore
Yee-Chia Yeo
Affiliation:
eleyeoyc@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
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Abstract

We investigated the material and electrical characteristics of platinum and ytterbium silicides for potential applications as metallic Schottky-barrier source/drain (S/D) and fully-silicided (FUSI) gate electrodes in fin field-effect transistors (FinFETs). Due to the low electro-negativity parameter of ytterbium, a low temperature silicidation process was developed to avoid the reaction of ytterbium with the isolation regions (i.e. SiO2 and SiN) to integrate ytterbium silicide successfully in mesa-isolated n-FinFETs. The integration of FUSI metal gate into p-FinFETs was also explored in this work and a novel two-step silicidation process that integrates simultaneously two different phases of platinum silicide with the appropriate work function values for gate electrode and source/drain application was demonstrated.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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