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A Study of Loop Evolution During Inert Ambient Annealing and Reaction Between Point Defects and Dislocation Loops During Oxidation of Silicon

Published online by Cambridge University Press:  21 February 2011

J. Liu  and
K. S. Jones
J. Liu
Affiliation:
Department of Materials Science and Engineering, University of Florida, Gainesville, FL 32611
K. S. Jones
Affiliation:
Department of Materials Science and Engineering, University of Florida, Gainesville, FL 32611
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Abstract

In the first part of this work, a plan-view TEM study has been made of the time-dependent annealing behavior of end of range (type II) dislocation loops introduced by lxl015/cm2 50KeV Si+ implantation into silicon. The activation energy for loop growth was determined to be 1.0±0.2eV from the Arrhenius plot of loop growth rate versus the reciprocal of annealing temperature. In the second part of this study, a thin boron layer was used as a diffusion monitor. The number of injected interstitials as a result of oxidation was measured by TEM. The diffusivity of boron with and without the presence of loops was studied by fitting experimental SIMS profiles with FLOOPS simulations. The interaction between loops and interstitials was determined to be diffusion limited.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 354: Symposium A – Beam Solid Interactions for Materials Synthesis and Characterization , 1994 , 293
Copyright
Copyright © Materials Research Society 1995

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References

1 Antoniadis, D.A. and Moskowitz, I., J. Appl. Phys., 53, 6788 (1982).Google Scholar
2 Listerbarger, J. K. and Jones, K. S., J. Appl. Phys., 73, 4815 (1993).Google Scholar
3 Jones, K. S. and Venables, D., J. Appl. Phys., 69, 2931 (1991).Google Scholar
4 developed by M. E. Law, Dept. of E.E., Univ. of Florida, Gainesville, FL 32611.Google Scholar
5 Liu, J., Law, M. E. and Jones, K. S., to be published.Google Scholar
6 Ghandhi, S. K., VLSI Fabrication Principles, Si and GaAs, Chap.4, Wiley, New York (1983).Google Scholar
7 APackan, P., Ph.D. Thesis, Stanford Univ., Stanford, CA (1991).Google Scholar
8 Packan, P. A. and Plummer, J. D., J. Appl. Phys., 68, 4327 (1990).Google Scholar
9 Park, H., Jones, K. S. and Law, M. E., J. Electrochem. Soc, 141, 3 (1993).Google Scholar