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The Study of Improving the Conversion Efficiency and Reducing the Thickness of the HIT Solar Cell

  • Yasuko Hirayama (a1), Hirotada Inoue (a1), Kenta Matsuyama (a1), Yasu umi Tsunomura (a1), Daisuke Fujishima (a1), Ayumu Yano (a1), Shigeharu Taira (a1), Takeshi Nishiwaki (a1), Toshio Asaumi (a1), Toshihiro Kinoshita (a1), Mikio Taguchi (a1), Hitoshi Sakata (a1) and Eiji Maruyama (a1)...

Abstract

In order to reduce the power-generating cost of silicon solar cells, it is necessary to achieve a high conversion efficiency using a thinner crystalline silicon (c-Si) substrate. The HIT solar cell is an amorphous silicon (a-Si) /crystalline silicon (c-Si) heterojunction solar cell that makes it possible to realize excellent surface passivation and hence high open circuit voltage (Voc). In addition, its symmetrical structure and a low-temperature fabrication process that is under 200°C provide advantages in reducing thermal and mechanical stresses within the device so that it can easily be applied to thinner solar cells. We fabricated HIT solar cells using thin wafers from 58-98 μm, and achieved a 22.8% conversion efficiency with a HIT solar cell using a 98-μm-thick wafer, and an excellent Voc value of 0.747 V with a HIT solar cell using a 58-μm-thick wafer.

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1. Inoue, H., Tsunomura, T., Fujishima, D., Yano, A., Taira, S., Ishikawa, Y., Nishiwaki, T., Nakashima, T., Asaumi, T., Taguchi, M., Sakata, H., and Maruyama, E., Proc.2009 MRS Fall Meeting (to be published)
2. Taguchi, M., Matsuyama, T., Matsuoka, T., Tsuda, S., Nakano, S., Kishi, Y. and Kuwano, Y., (5th PVSEC Proc., 1990) pp. 689692
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4. Sakata, H., Tsunomura, Y., Inoue, H., Taira, S., Baba, T., Kanno, H., Kinoshita, T., Taguchi, M. and Maruyama, E., (EU-PVSEC Proc., 2010) (to be published)
5. Taira, S., Yoshimine, Y., Terakawa, A., Maruyama, E., and Tanaka, M., (Proc. of. Renewable Energy 2006) pp. 115118

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