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A Study of Charge Control and Gate Tunneling in a Ferroelectric-Oxide-Silicon Field Effect Transistor

Published online by Cambridge University Press:  17 March 2011

Yih-Yin Lin
Affiliation:
Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122
Yifei Zhang
Affiliation:
Integrated Device Technology, Duluth, GA 30097
Jasprit Singh
Affiliation:
Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122
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Abstract

It is known that conventional metal-oxide-silicon field-effect transistor (MOSFET) devices will have gate tunneling related problems at very thin oxide thicknesses (dox ≤ 20 Å). In this paper we discuss the potential of polar and non-polar high-dielectric films for gate tunneling suppression and charge control. We also examine ferroelectric thickness effects in ferroelectricoxide- silicon field effect transistors (MFISFETs). Our formalism is based on a blocking-layer model for the ferroelectric film and a self-consistent solution of the Poisson and Schrodinger equations. We show that the polarization effects of ferroelectrics can allow greater controllability of the silicon interface (mobile) charge density and also the high dielectric constant effectively suppresses gate tunneling probability. In addition, the effects of ferroelectric film thickness are quite important in a MFISFET device and allow a small control of the threshold voltage. Results will be presented for the capacitance-voltage curve, tunneling probability, and leakage currents. As an example, we find for a sheet charge of 1013 cm−2, the gate tunneling probability in a MOS structure is 10−6 (dox = 13 Å), while that in a MFISFET is 10−14 with the same equivalent oxide thickness. Our studies also show that details of the blocking layer model (dead layer thickness, coercive field, and polar charge) can be estimated from C-V measurements.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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References

1. Taur, Y. and Ning, T., Fundamentals of Modern VLSI Devices, (Cambridge, Cambridge, 1998), p. 200.Google Scholar
2. Chen, T., Balu, V., Katakam, S., Lee, J., and Lee, J. C., IEEE Trans. Electron Devices 46, 2304 (1999).Google Scholar
3. Padmini, P., Taylor, T. R., Lefevre, M. J., Nagra, A. S., Speck, J. S., and York, R.A., Appl. Phys. Lett. 75, 3186 (1999).Google Scholar
4. Zhang, Y. and Singh, J., J. Appl. Phys. 85, 587 (1999).Google Scholar
5. Zhang, Y., Smorchkova, I. P., Elsass, C. R., Keller, S., Ibbetson, J. P., Denbaars, S., Mishra, U. K., and Singh, J., J. Appl. Phys. 87, 7981 (2000).Google Scholar
6. Larsen, P. K., Dormans, G. J. M., Taylor, D. J., and Veldhoven, P. J. van, J. Appl. Phys. 76, 2405 (1994).Google Scholar
7. Lin, Y. -Y., Zhang, Y., Singh, J., York, R., and Mishra, U., J. Appl. Phys. 89, 1856 (2001).Google Scholar
8. Dat, R., Lee, J. K., Auciello, O., and Kingon, A. I., Appl. Phys. Lett. 67, 572 (1995)Google Scholar
9. Basceri, C., Streiffer, S. K., Kingon, A. I., and Waser, R., J. Appl. Phys. 82, 2497 (1997).Google Scholar
10. Abe, K. and Komatsu, S., J. Appl. Phys. 77, 6461 (1995).Google Scholar