The mismatch between the coefficients of thermal expansion of silicon chips and their organic substrates has been mitigated through the practice of using underfill in flip-chip packages. Yet solder fatigue and package failures still occur. This is particularly true for flip-chips on organic substrates that are thermally cycled between low (−55 °C) and high temperatures (125 °C). In this study, I used electron-beam moir6 to measure displacements and calculate strains in a solderball contained in a flip-chip plastic-ball grid array package. A crossed-line grating with a pitch of 450 nm was used to allow detailed measurements of the local displacements from a cross section of a flip-chip package. Elastic displacements were observed and measured, and the v-field displacements, out of the plane of the chip, were more significant than the shear or u-field, in the plane of the chip, displacements. Larger v-field displacements were measured near the center of the silicon chip than at the edge of the chip.