An overview is provided of an evolving atomistic and kinetic model of semiconductor growth that unifies the main features of strain relaxation in low and high lattice misfit heteroepitaxy. The model reveals a kinetic pathway for dislocation formation during growth with little or no energy cost at low misfits, thus providing a way out of the longstanding dilemma of too high dislocation nucleation energies predicted by classical theories of the equilibrium behaviour of a fixed number of particles at low misfits. The essential kinetic processes underlying the model are identified on the basis of comparison of the predictions of kinetic Monte-Carlo simulations of growth with real-time or in-situ data obtained in such experiments as reflection high-energy electron diffraction (RHEED) and scanning probe microscopy (SPM). Relative significance of these atomistic kinetic processes is shown to naturally lead to strain relaxation via defect initiation at low misfits while maintaining smooth surface morphology or at high misfits change to 3-dimensional morphology while initially maintaining coherence. The potential role of steps in providing sources for defect formation is examined through molecular dynamics simulations of Ge overlayers on Si (001) stepped surfaces.