Article contents
Roughness of TFT Gate Metallization and its Impact on Leakage, Threshold Voltage Shift and Mobility
Published online by Cambridge University Press: 17 March 2011
Abstract
A comparison of the performance of aluminium (Al)-gated thin film transistors (TFTs) is presented in which we varied its sputter deposition conditions, such as deposition temperature, process pressure, and power. Gate films deposited at 30°C/5mTorr/300W yield TFT characteristics with low leakage current (~ 10 fA at low VDS), an ON/OFF ratio better than 108, and a mobility of 1.1 cm2/Vs. In contrast, films deposited at 150°C/10mTorr/400W, yield a significant degradation in leakage current (~ 1 pA) and mobility (0.77 cm2/Vs). The degradation stems from the high surface roughness of the a-SiNx:H gate insulator, and hence the TFT channel, caused by hillock formation on the Al gate. In addition, the high roughness leads to a correspondingly large shift in threshold voltage. After one-hour bias stress of +25 V applied to the gate, the shift in threshold voltage is ΔVT ~ 5 V, as compared to the small shift of ΔVT ~ 2.3 V associated with the smoother gate. Also included in our comparison is a TFT whose Al gate is now capped with 20 nm of molybdenum (Mo) to minimize propagation of the gate surface roughness to the active channel. Its cross sectional topography shows the interface smoothness to be as good or better, to yield improved leakage and stability characteristics.
- Type
- Research Article
- Information
- Copyright
- Copyright © Materials Research Society 2000
References
REFERENCES
- 1
- Cited by