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Roughness of TFT Gate Metallization and its Impact on Leakage, Threshold Voltage Shift and Mobility

Published online by Cambridge University Press:  17 March 2011

A. Nathan ,
B. Park ,
A. Sazonov  and
R.V.R. Murthy
A. Nathan
Affiliation:
Electrical and Computer Engineering, University of Waterloo Waterloo, Ontario, Canada N2L 3G1 anathan@venus.uwaterloo.ca
B. Park
Affiliation:
Electrical and Computer Engineering, University of Waterloo Waterloo, Ontario, Canada N2L 3G1 anathan@venus.uwaterloo.ca
A. Sazonov
Affiliation:
Electrical and Computer Engineering, University of Waterloo Waterloo, Ontario, Canada N2L 3G1 anathan@venus.uwaterloo.ca
R.V.R. Murthy
Affiliation:
Electrical and Computer Engineering, University of Waterloo Waterloo, Ontario, Canada N2L 3G1 anathan@venus.uwaterloo.ca
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Abstract

A comparison of the performance of aluminium (Al)-gated thin film transistors (TFTs) is presented in which we varied its sputter deposition conditions, such as deposition temperature, process pressure, and power. Gate films deposited at 30°C/5mTorr/300W yield TFT characteristics with low leakage current (~ 10 fA at low VDS), an ON/OFF ratio better than 108, and a mobility of 1.1 cm2/Vs. In contrast, films deposited at 150°C/10mTorr/400W, yield a significant degradation in leakage current (~ 1 pA) and mobility (0.77 cm2/Vs). The degradation stems from the high surface roughness of the a-SiNx:H gate insulator, and hence the TFT channel, caused by hillock formation on the Al gate. In addition, the high roughness leads to a correspondingly large shift in threshold voltage. After one-hour bias stress of +25 V applied to the gate, the shift in threshold voltage is ΔVT ~ 5 V, as compared to the small shift of ΔVT ~ 2.3 V associated with the smoother gate. Also included in our comparison is a TFT whose Al gate is now capped with 20 nm of molybdenum (Mo) to minimize propagation of the gate surface roughness to the active channel. Its cross sectional topography shows the interface smoothness to be as good or better, to yield improved leakage and stability characteristics.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 609: Symposium A – Amorphous & Heterogeneous Silicon Thin Films – 2000 , 2000 , A28.6
Copyright
Copyright © Materials Research Society 2000

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References

REFERENCES

1. Fryer, P.M., Colgan, E.C., Galligan, E., Graham, W., Horton, R., Hunt, D., Latzko, K., Nywening, R., Jenkins, L., John, R., Koke, P., Kuo, Y., Libsch, F., Lien, A., Lovas, I., Polastre, R., Rothwell, M.E., Souk, J., Wilson, J., Wisnieff, R., Wright, S., SID Int., Symp., Dig. Tech. Papers, 333 (1996).Google Scholar
2. Sirringhaus, H., Theiss, S.D., Kahn, A., and Wagner, S., IEEE Trans. Electron Device Lett., 18, 388 (1997).Google Scholar
3. Tsujimura, T., Kitahara, H., Makita, A., Fryer, F. and Batey, J., Int. Display Research Conf., 142 (1996).Google Scholar
4. Kim, C.W., Jeong, C.O., Song, H.S., Kim, Y.S., Kim, J.H., Choi, J.H., Hur, M.K., Yang, H.G., and Souk, J.H., SID Int. Symp., Dig. Tech. Papers, 337 (1996).Google Scholar
5. Hayashi, M., Inoue, K., Noumi, S., Sakata, K., Takeguchi, T., Morita, T., Eguchi, T., SID Int., Symp., Dig. Tech. Papers, 885 (1997).Google Scholar
6. Takatsuji, H., Iiyori, Hideo, Tsuji, S., Tsujimoto, K., Kuroda, K., Saka, H., Mater. Res. Soc. Symp. Proc., 471, 99 (1997).Google Scholar
7. Arai, T., Hiromasu, Y., and Tsuji, S., Mater. Res. Soc. Symp. Proc., 424, 37 (1997).Google Scholar
8. Kim, J. H., Kanicki, J. and Boer, W. den, Mater. Res. Soc. Symp. Proc., 471, 111 (1997).Google Scholar
9. Nathan, A., Murthy, R.V.R., Park, B., and Chamberlain, S.G., High Performance a-Si:H TFTs Based on Aluminum Gate Metallization, Journal of Microelectronics Reliability, to appear.Google Scholar
10. Bunshah, R.F., Blocher, J.M. Jr, Bonifield, T.D., Fish, J.G., Ghate, P.B., Jacobson, Birgit E., Mattox, D.M., McGuire, G.E., Schwartz, M., Thornton, J.A., and Tucker, R.C. Jr, Deposition Technologies for Films and Coatings, (Noyes Publications, 1982) p. 214.Google Scholar
11. Nathan, A., Austin, M., Pereira, D., Correlation between leakage current and overlap capacitance in a-Si:H TFTs, Proc., IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensor, 126–129 (1999).Google Scholar