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Laser Crystallized Polysilicon Thin Films and Applications

  • J. B. Boyce (a1), P. Mei (a1), D. K. Fork (a1), G. B. Anderson (a1) and R. I. Johnson (a1)...

Abstract

Pulsed excimer-laser crystallization of amorphous silicon on non-crystalline substrates is an important processing technique for large-area polycrystalline silicon films and devices. Interest stems, in large part, from proposals to use polycrystalline silicon on glass in large-area electronic applications, such as flat-panel active matrix displays and two-dimensional imaging systems. The polycrystalline silicon is envisioned to increase the functionality and reduce costs over the current circuits that use amorphous silicon. Also, it is found that laser-crystallized polycrystalline silicon exhibits some interesting materials properties, such as a sharp peak in the average grain size with large lateral grain growth as a function of excimer laser energy density. The average grain size increases with increasing laser fluence and peaks on the order of several microns or two orders of magnitude larger than the film thickness. The grain size then decreases with further increases in laser fluence. This peak in grain size is accompanied by a similar peak in the Hall electron mobility. This is a significant relationship for devices since the grain structure has a substantial influence on electrical properties. But to the detriment of device parameters, this large lateral grain growth occurs over a very arrow range of laser fluences and is accompanied by a corresponding peak in the surface roughness of the films. These relationships between laser processing conditions, materials properties, and device parameters force a compromise between large grain size for high mobility and homogeneity of material for uniformity of device characteristics. A window does exist in process parameter space where good-quality devices with uniform characteristics have been obtained. In addition, these attributes have been achieved under conditions that yield good polycrystalline silicon and good amorphous silicon devices on the same wafer within a mm of one another, allowing for hybrid polycrystalline and amorphous silicon circuits.

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