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Investigations of an Antimony Doped Poly-Silicon Gate Structure for P-Type JFET Applications

Published online by Cambridge University Press:  21 February 2011

Anders SÖDERBÄrg
Affiliation:
University of Uppsala, Department of technology, P.O. Box 534, S-751 21 Uppsala, Sweden
Ö. Grelsson
Affiliation:
University of Uppsala, Department of technology, P.O. Box 534, S-751 21 Uppsala, Sweden
U. Magnusson
Affiliation:
University of Uppsala, Department of technology, P.O. Box 534, S-751 21 Uppsala, Sweden
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Abstract

A polysilicon gate structure for application as gate material in p-channel JFET's is presented. The structure was manufactured using solid-phase epitaxy of an evaporated antimony/amorphous—silicon layer. The fabrication process together with experimental evaluation of both diode and JFET characteristics is given. The structure shows near ideal n+p-junction behaviour and the fabricated JFET's are normally off with good values of subthreshold swing and transconductance.

Type
Research Article
Copyright
Copyright © Materials Research Society 1990

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