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Investigation of SET and RESET States Resistance in Ohmic Regime for Phase-Change Memory

Published online by Cambridge University Press:  01 February 2011

Semyon D. Savransky  and
Ilya V Karpov
Semyon D. Savransky
Affiliation:
semyon.d.savransky@intel.com, Intel Corporation, R&D, 2200 Mission College Boulevard, Santa Clara, CA, 95054, United States
Ilya V Karpov
Affiliation:
Ilya.V.Karpov@intel.com, Intel Corporation, Santa Clara, CA, 94054, United States
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Abstract

New technique to separate bulk and interface electrical properties of polycrystalline and glassy Ge2Sb2Te5 (GST) in phase-change memory (PCM) devices is proposed. PCM with different GST thicknesses are measured. The average activation energies for bulk conductivity are 0.37 eV and 0.09 eV as well as bulk resistivities are about μOhm*cm2 and 20 μOhm*cm. The contact barriers is 0.07eV and specific contact resistance is about 0.3 μOhm*cm2 in studied PCM devices.

It is discovered that bulk resistivities for both SET and RESET states in PCM obey Meyer-Neldel rule with almost identical isokinetic temperatures 335K − 340K. This information is discussed in terms of GST structure.

Keywords

memoryTedevices
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1072: Symposium G – Phase-Change Materials for Reconfigurable Electronics and Memory Applications , 2008 , 1072-G06-09
Copyright
Copyright © Materials Research Society 2008

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