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Interfaces in Ferroelectric Metal Oxide Heterostructures

Published online by Cambridge University Press:  15 February 2011

R. Ramesh ,
J. Lee ,
V. G. Keramidas ,
D. K. Fork ,
S. Ghonge ,
E. Goo  and
O. Auciello
R. Ramesh
Affiliation:
Bellcore, Red Bank, NJ 07701.
J. Lee
Affiliation:
Bellcore, Red Bank, NJ 07701.
V. G. Keramidas
Affiliation:
Bellcore, Red Bank, NJ 07701.
D. K. Fork
Affiliation:
Xerox Palo Alto Research Center, Palo Alto, CA 94305.
S. Ghonge
Affiliation:
Department of Materials Science and Engineering, University of Southern California, University Park, Los Angeles, CA 90089.
E. Goo
Affiliation:
Department of Materials Science and Engineering, University of Southern California, University Park, Los Angeles, CA 90089.
O. Auciello
Affiliation:
MCNC Electronics Technology Division, Research Triangle Park, NC 27709–2889.
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Abstract

Realization of a viable nonvolatile ferroelectric thin film memory technology hinges on the successful solution of the reliability problems associated with the ferroelectric capacitor concurrent with the integration of these materials with the appropriate Si-CMOS based drive electronics. This integration process introduces a variety of structural, chemical, ionic and electronic interfaces in the memory elements. In this paper, the influence of some of the interfaces on the ferroelectric properties and on the process integration is discussed.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 343: Symposium H – Polycrystalline Thin Films - Structure, Texture, Properties and Applications , 1994 , 431
Copyright
Copyright © Materials Research Society 1994

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References

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