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Instability in Amorphous Silicon Dioxide/Amorphous Silicon Structures

Published online by Cambridge University Press:  22 February 2011

G. Fortunato
Affiliation:
Istituto di Elettronica dello Stato Solido, CNR, Via Cineto Romano 42, 00156 ROMA, ITALY
L. Mariucci
Affiliation:
Istituto di Elettronica dello Stato Solido, CNR, Via Cineto Romano 42, 00156 ROMA, ITALY
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Abstract

Amorphous insulator/amorphous silicon structures show, under bias-stress conditions, a drift of the electrical characteristics. In the present work, in order to discriminate the main source of instability in amorphous silicon dioxide/amorphous silicon Thin-Film Transistors, the determination of both threshold voltage and flat-band voltage has been performed after bias-stressing the devices with different gate voltages and at different temperatures. Flat-band voltage was determined by the space-charge photomodulation technique. From the close correlation observed between the two quantities, we conclude that the predominant instability mechanism is represented by change in the gate insulator charge at and near the insulator/semiconductor interface. Time evolution of the threshold voltage shifts has been investigated as a function of stress bias and temperature. The data are explained in terms of a new model based on the dispersive charge injection (hopping of electrons via localised states) into the first 2–3 nm of the gate insulator adjacent to die semiconductor layer (transitional region). Possible origin of the transitional region can be related to the reduction of the gate insulator induced by activated hydrogen, as suggested by photoemission experiments performed with synchrotron radiation on SiO2 bombarded with low energy (100 eV) H-ions.

Type
Research Article
Copyright
Copyright © Materials Research Society 1993

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References

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