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Impact of Metal Contamination of 7.0nm Gate Oxides on Various Substrate Materials

  • S. Saito (a1), K. Hamada (a1), D. J. Eaglesham (a2), Y. Shiramizu (a1), J. L. Benton (a2), H. Kitajima (a1), S. D. C. Jacobson (a2) and J. M. Poate (a2)...

Abstract

Metal contamination level will be decreased in order to maintain a device reliability according to device size reduction. Metal contamination from various processes are surveyed. The influence of metal contamination for 7–15nm thick gate oxides is discussed in order to clarify the critical concentration to gate oxides. NIG(Non Intrinsic Gettering) substrates are used in a worst case for gettering. Fe contamination with 4×1010 cm-2 strongly affects the TDDM characteristics, although there is no serious influence in the breakdown voltage even at the concentration of 5×1011 cm-2. The same tendency is observed for Cu contaminant and the critical concentration for TDDB characteristics is around 3×1011 cm-2. High energy B implantation is carried out to form gettering sites near device region. Breakdown voltage and TDDB characteristics are almost the same as epitaxial substrates at Fe concentration up to 1×1012 cm-2. Detailed examination such as SIMS, C-t and DLTS measurements is also supported the effectiveness in high energy gettering.

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1. Shiramizu, Y. and Kitajima, H., Extended Abstracts of the 1995 Conference on Solid State Devices and Materials, p273 (1995)
2. Ryuta, J., Yoshimi, T.,, Kondo, H., Okuda, H. and Shimanuki, Y., Jpn J. Appl. Phys. 31, p2338 (1992)
3. Shiramizu, Y., Tanaka, M., Yamazaki, S., Nakamori, M., Aoto, N. and Kitajima, H., Extended Abstracts of the 1996 Conference on Solid State Devices and Materials, p362 (1996)
4. Benton, J.L., Stolk, P.A., Eaglesham, D.J., Jacobson, D.C., Cheng, J.Y., Poate, J.M., Myers, S.M. and Haynes, T.E., J. Electrochem. Soc., 143, p1406 (1996)
5. Hamada, K., Eaglesham, D.J., Hayashi, T., Poate, J.M. and Saito, S., Extended Abstracts of the 1996 Conference on Solid State Devices and Materials, p854 (1996)

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