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The Impact of Device Asymmetry on the Electrical and Reliability Properties of Ferroelectric PZT for Memory Applications

  • Jiyoung Kim (a1), C. Sudhama (a1), Vinay Chikarmane (a1), Rajesh Khamankar (a1), Jack Lee (a1) and Al Tasch (a1)...

Abstract

The origin and the effects of asymmetrical electrical behavior in sputtered PZT (Zr/Ti=65/35) thin film capacitors with Pt electrodes have been studied. The asymmetry and constriction in the P-E hysteresis loops are understood to result from differences in mechanical stress at the top and bottom PZT/Pt interfaces because they experience different thermal cycles during fabrication. A method for correctly positioning asymmetric loops on the polarization axis is suggested. Both d.c. and a.c. electrical stressing (of either polarity) lead to hysteresis relaxation and symmetrization. A post-processing anneal leads to electrically symmetrical devices.

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The Impact of Device Asymmetry on the Electrical and Reliability Properties of Ferroelectric PZT for Memory Applications

  • Jiyoung Kim (a1), C. Sudhama (a1), Vinay Chikarmane (a1), Rajesh Khamankar (a1), Jack Lee (a1) and Al Tasch (a1)...

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