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Gate Stacks for Low Voltage Ferroelectric Field Effect Devices Based on Pt/SBT/CeO2/Si(100)
Published online by Cambridge University Press: 10 February 2011
Abstract
METS (Metal Ferroelectric Insulator Semiconductor) capacitors were fabricated using CSD (Chemical Solution Deposition). Thin layers of CeO2 were deposited as an insulating buffer layer on Si(100) substrates and SrBi2Ta2O9 (SBT) was used as a ferroelectric layer. Pt electrodes were deposited by evaporation on top of the SBT layer. At constant SBT thickness the thickness of the CeO2 layer was varied to investigate the effects of the change in capacitance ratio between the ferroelectric and the buffer layer. XRD spectra were used to determine the phase of the SBT and the quality of the CeO2 layer. C(V) measurements showed the ferroelectric nature of the SBT. Additional information was provided by TEM and EDX analysis.
Some samples showed a memory window as big as 1.6 Volt at a moderate voltage sweep from −3.5 to +3.5 Volt. Interface state density is approximately 2×1011/cm2 eV and remanent polarization was found to be in the range of 0.3 μC/cm2. These results are already very promising in terms of fabricating a Ferroelectric FET. Some basic considerations with respect to the development of IT memory cells on the basis of this kind of transistor will also be presented.
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- Copyright © Materials Research Society 2000