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Epitaxial Lanthanide Oxide based Gate Dielectrics

  • H. Jörg Osten (a1), Apurba Laha (a2) and Andreas Fissel (a3)


Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm CMOS technology. We present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. On Si(100), crystalline Gd2O3 grows usually as (110)-oriented domains, with two orthogonal in-plane orientations. Layers grown under best vacuum conditions often exhibit poor dielectric properties due to the formation of crystalline interfacial silicide inclusions. Additional oxygen supply during growth improves the dielectric properties significantly. Layers grown by an optimized MBE process display a sufficiently high-K value to achieve equivalent oxide thickness values < 1 nm, combined with ultra-low leakage current densities, good reliability, and high electrical breakdown voltage. A variety of MOS capacitors and field effect transistors has been fabricated based on these layers. Efficient manipulation of Si(100) 4° miscut substrate surfaces can lead to single domain epitaxial Gd2O3 layer. Such epi-Gd2O3 layers exhibited significant lower leakage currents compared to the commonly obtained epitaxial layers with two orthogonal domains. For capacitance equivalent thicknesses below 1 nm, this differences disappear, indicating that for ultrathin layers direct tunneling becomes dominating. We investigated the effect of post-growth annealings on layer properties. We showed that a standard forming gas anneal can eliminate flatband instabilities and hysteresis as well as reduce leakage currents by saturating dangling bond caused by the bonding mismatch. In addition, we investigated the impact of rapid thermal anneals on structural and electrical properties of crystalline Gd2O3 layers grown on Si with different orientations. The degradation of layers can be significantly reduced by sealing the layer with amorphous silicon prior to annealing.



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