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Electronics Packaging Materials Research at NIST

  • Michael A. Schen (a1), G. T. Davis (a1), F. I. Mopsik (a1), W. L. Wu (a1), W. E. Wallace (a1), Jr. Manning (a2), C. A. Handwerker (a2) and D. T. Read (a3)...

Abstract

The Materials Science and Engineering Laboratory at NIST has augmented its laboratory-based research in support of the U.S. commercial microelectronics industry by expanding its efforts in electronics packaging, interconnection and assembly (P/I/A) materials technologies. In conjunction with industry, university and other government agency partners, these new NIST efforts target materials technology issues that underlie the priorities contained within the various electronics industry technology roadmaps. A dominant aspect of the laboratory P/I/A program focuses on the in-situ metrology and data needs associated with the materials and complex material assemblies which comprise today's microelectronic components and circuits.

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1.Advanced Manufacturing Technology Initiative: U.S. Electronics Industry Priorities,” American Electronics Association, 5201 Great American Parkway, Suite 520, Santa Clara, CA 95054, 1993.
2. Report of the Electronic Materials Working Group of the National Science and Technology Council, Materials Technology Committee, Draft, April 6, 1995.
3. Smith, J., Semiconductor International, pg 41, February 1995.
4. The National Technology Roadmap for Semiconductors, Semiconductor Industry Association, San Jose, CA, 1994.
5. Technology Roadmap: The Future of the Electronic Interconnection Industry, Institute for Interconnecting and Packaging Electronic Circuits, Lincolnwood, IL, 1994.
6. For further information on the National Semiconductor Metrology Program, contact Robert I. Scace, Director, NIST, Office of Microelectronics Programs, Technology Building, Room A323, Gaithersburg, MD 20899, phone: (301) 975–4400, E-mail: . For further information on the Advanced Materials Program in Electronics Packaging and Interconnection, contact Michael Schen, Program Coordinator, NIST, Materials Science and Engineering, Bldg.224/Rm.B320, Gaithersburg, MD 20899, phone: (301) 975–6741, E-mail: .
7. Carpenter, Joseph A. Jr., ed, unpublished results, Measurements of the Properties ofMaterials in Microelectronics Packaging, sponsored by NIST, Semiconductor Research Corporation, the Microelectronics and Computer Technology Corporation, the Microelectronics Center of North Carolina, the U.S. Army Harry Diamond Laboratory, the U.S. Air Force Wright Research and Development Center, and the U.S. Naval Weapons Support Center, November 1990.
8. Schen, Michael A., ed., Metrology and Data for Microelectronics Packaging and Interconnection, Results of a joint workshop, May 5–6, 1994, NISTIR 5520, November 1994.
9. Wu, W.L., Orts, W.J., Majkrzak, C.J., Hunston, D.L., Water Adsorption at a Polyimide - Silicon Wafer Interface, Polym. Engr. and Sci., June 1995, in press.
10. Commercial equipment, instruments, materials or services are identified in this paper to adequately report the work conducted. Such identification does not imply a recommendation, endorsement, or criticism by the National Institute of Standards and Technology.
11. Wallace, W.E., vanZanten, J.H., Wu, W.L., Bulletin of the American Physical Society, Series II, 40(1), 675 (1995).
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Electronics Packaging Materials Research at NIST

  • Michael A. Schen (a1), G. T. Davis (a1), F. I. Mopsik (a1), W. L. Wu (a1), W. E. Wallace (a1), Jr. Manning (a2), C. A. Handwerker (a2) and D. T. Read (a3)...

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