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Electrical and Optical Study of Charge Traps at Passivated GaAs Surfaces

Published online by Cambridge University Press:  10 February 2011

Yasunori Mochizuki*
Affiliation:
Fundamental Research Laboratories, NEC Corporation, 34 Miyukigaoka, Tsukuba, Ibaraki 305–8501, Japan, mochizuk@frl.cl.nec.co.jp
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Abstract

Performance of GaAs-based FETs is strongly affected by the electrical properties of passivated surfaces via the surface charges induced at interface states and at the traps within the passivation films. In order to study these two kinds of sources, a set of new characterization techniques are respectively developed for the GaAs interface system, which is in a largely different situation from that for the SiO2/Si interfaces. Our optical technique based on electroreflectance allows accurate evaluation of interface states and is especially useful for the material systems with strong surface pinning. For the study of trapping centers in CVD dielectrics, use of thermally oxidized Si interfaces is found to be quite convenient. The experimental findings are further discussed in conjunction with FET characteristics and an importance of time-domain control of the surface charges is emphasized in the power FET operation. This concept turns out to be the main motivation of a new MESFET structure with a filed-modulating plate (FPFET) which has achieved a state-of-the-art RF performance based on GaAs.

Type
Research Article
Copyright
Copyright © Materials Research Society 1999

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