Skip to main content Accessibility help

Effects of Top Insulator Overlap on the Stability in Hydrogenated Amorphous Silicon Thin Film Transistors

  • H.S. Choi (a1), Y.S. Kim (a1), S.K. Lee (a1), J.K. Yoon (a1), W.S. Park (a1) and Andm. K. Han (a1)...


The effects of top-insulator on the instability problems of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) have been studied. In a-Si:H TFT with top-insulator (E/S type), charge trapping into the both of top-insulator and gate insulator has been shown under the bias stress.

In order to investigate the charge trapping effects of top-insulator, we proposed a new method of Measurement. By this Method, we observed that trapped charges in top-insulator increased drain currents for positive gate bias stress, and this increment of drain currents was more serious with increasing the ratio of source/drain overlap length to channel length. It has founded that the instability problems of a-Si:H TFTs was attributed to the effects of top-insulator as well as that of gate insulator.



Hide All
1. LeComber, P.G., Spear, W.E. and Ghaith, A., Electron Lett. 15, 179 (1979)
2. Fortunato, G., Mariucci, L., and Reità, C., Appl. Phys. Lett. 59, 7 (1991)
3. Libsch, F.R. and Kanicki, , Appl. Phys. Lett. 62, 11 (1993)
4. Lee, S.K., Oh, C.H., Kim, Y.S., Park, J.S., Choi, Y.I., Jang, J. and Han, M.K., J. Non-Cryst. Solids, 164–166, 763766 (1993)
5. Uchikoga, S., Akiyama, M., Koizomi, T., Dceda, M. and Suzaki, K., Mat. Res. Soc. Symp. Proc. Vol. 258 (1992)
6. Shaw, J.G. and Hack, M., J. Appl. Phys., Vol 65, 2124 (1989)
7. McWhorter, P.J. and Winokur, P.S., Appl. Phys. Lett. 48, 2 (1986)
8. Powell, M.J., Appl. Phys. Lett. 43, 6 (1983)


Full text views

Total number of HTML views: 0
Total number of PDF views: 0 *
Loading metrics...

Abstract views

Total abstract views: 0 *
Loading metrics...

* Views captured on Cambridge Core between <date>. This data will be updated every 24 hours.

Usage data cannot currently be displayed