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Effects of Rapid Thermal Processing on Thermal Oxides of Silicon#

Published online by Cambridge University Press:  28 February 2011

S.K. Lee ,
D.K. Shih ,
D.L. Kwong ,
N.S. Alvi ,
N.R. Wu  and
H.S. Lee
S.K. Lee
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
D.K. Shih
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
D.L. Kwong
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX 78712
N.S. Alvi
Affiliation:
Delco Electronics, GMC, Kokomo, IN 46902
N.R. Wu
Affiliation:
Gould AMI Semiconductors, Santa Clara, CA 95051
H.S. Lee
Affiliation:
General Motors Research Laboratories, Warren, MI 48090-9055
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Abstract

The effects of rapid thermal processing (RTP) on the electrical properties of thin gate oxides in MOS devices have been studied. MOS capacitors have been analyzed by capacitance-voltage (C-V), current-voltage (I-V), and constant current stress techniques. MOSFET degradation due to hot carrier injection has also been investigated. No significant RTP-induced degradation was detected in any category of the device properties considered here. An abnormal trapping behavior was observed on the wafer annealed at 1100°C for 5 seconds.

Type
Articles
Information
MRS Online Proceedings Library (OPL) , Volume 71: Symposium F – Materials Issues in Silicon Integrated Circuit Processing , 1986 , 449
Copyright
Copyright © Materials Research Society 1986

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Footnotes

#

This work was supported by Semiconductor Research Corporation under Contract 85-07-061 and Texas Advanced Technology Research Program.

References

[1]. See, for example, Symposium B on RTP, Material Research Society 1985 Fall Meeting.Google Scholar
[2]. Sturm, J.C., Gronet, C.M. and Gibbons, J.F., IEEE Electron Device Lett., vol. EDL–7, pp. 282–284, May 1986.Google Scholar
[3]. Nulman, J., Krusius, J.P. and Gat, A., IEEE Electron Device Lett., vol. EDL–6, pp. 205–207, May 1985.Google Scholar
[4]. Chou, N.J. and Eldridge, J.M., J. Electrochem. Soc., vol. 117, pp. 1287–1293, 1970.CrossRefGoogle Scholar
[5]. Mitsuhashi, J., Matsukawa, T., Sugimoto, K., and Kawazu, S., 1984 Symposium on VLSI Technology, pp. 84–85.Google Scholar