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Development of Spice Models for Amorphous Silicon Thin-Film Transistors

  • M. Hack (a1), J. G. Shaw (a1) and M. Shur (a2)

Abstract

In this paper we describe a new analytic model for both the current-voltage and capacitance-voltage characteristics of amorphous-silicon thin-film transistors. This analytic model has been incorporated into a circuit simulation program (SPICE) to provide an accurate comprehensive three terminal model for amorphous-silicon thin-film transistors. We present results showing good agreement between circuit simulations based on this new device model and experimental data. The development of amorphous silicon SPICE simulation tools increases the design accuracy of advanced analog and digital circuits.

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References

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1) Tuinenga, P.W., SPICE: A guide to Circuit Simulation and Analysis using PSPICE, Prentice Hall, New Jersey (1988)
2) Hack, M., Shaw, J.G., and Shur, M., Mat. Res. Soc. Symp. Proc., vol.118 p. 207 (1988)
3) Shur, M. and Hack, M., J. of Appl. Phys. 55, 3831 (1984)
4) Hack, M., Shur, M. and Shaw, J.G., to be published, IEEE Transactions on Electron Devices (special issue on amorphous silicon devices) December 1989
5) Shur, M., Hack, M. and Shaw, J.G., to be published, Journal of Applied Physics
6) Shur, M., Hack, M., Shaw, J.G. and Martin, R.A., to be published, Journal of Applied Physics
7) Shaw, J.G. and Hack, M., J. of Appl. Phys. 65, 2124 (1989)
8) For example see Sze, S. M., Physics of Semiconductor Devices, Wiley Press, New York 1969
9) Weisfield, R. L., Tuan, H. C., Fennell, L. and Thompson, M. J., Mat. Res. Soc. Symp. Proc., vol.95 p. 469 (1987)

Development of Spice Models for Amorphous Silicon Thin-Film Transistors

  • M. Hack (a1), J. G. Shaw (a1) and M. Shur (a2)

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