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Defect Reduction Paths in SiC Epitaxy

  • J. Zhang (a1), D.M. Hansen (a1), V.M. Torres (a1), B. Thomas (a1), G. Chung (a1), H. Makoto (a1), I. Manning (a1), J. Quast (a1), C. Whiteley (a1), E.K. Sanchez (a1), S. Mueller (a1), M.J. Loboda (a1), H. Wang (a2), F. Wu (a2) and M. Dudley (a2)...

Abstract

This paper discusses formation mechanisms and potential paths to reduce defect density in current SiC epitaxy technology. Comprehensive optimization efforts have resulted in defect density measured by laser light scattering below 0.5 cm-2 for 30 um thick epi wafers. Possible approaches to reduce basal plane dislocations and mitigate interfacial dislocations are discussed. The progress in epitaxy defect reduction has been made on the foundation of the high quality 100mm substrates. The average and median BPD density is 700 cm-2 and 500 cm-2, respectively, and a low TSD density is also achieved simultaneously with both average and median values around 350 cm-2. High quality and low stress 150mm substrates have been obtained with very low TSD density of <150 cm-2.

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