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Charge Storage Mechanism in Nano-Crystalline Si Based Single-Electron Memories

Published online by Cambridge University Press:  17 March 2011

Bruce J. Hinds
Affiliation:
Research Center for Quantum Effect Electronics Tokyo Institute of Technology 2-12-1 O-okayama, Meguro-ku, Tokyo 152-8552, Japan
Takayuki Yamanaka
Affiliation:
Research Center for Quantum Effect Electronics Tokyo Institute of Technology 2-12-1 O-okayama, Meguro-ku, Tokyo 152-8552, Japan
Shunri Oda
Affiliation:
Research Center for Quantum Effect Electronics Tokyo Institute of Technology 2-12-1 O-okayama, Meguro-ku, Tokyo 152-8552, Japan
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Abstract

A memory device sensitive to a single electron stored in a nanocrystalline Si dot has been synthesized allowing for the study of charge retention lifetime. A 50 nm by 20 nm transistor channel is synthesized by E-beam lithography followed by reactive ion etching of thin (20nm) Silicon-on-Insulator (SOI) channel. This small area of the narrow channel allows for the isolation of a single nano-crystalline Si dot and elimination of channel percolation paths around the screening charge. Remote Plasma Enhanced CVD is used to form 6±2nm diameter nc-Si dots in the gas phase from a pulsed SiH4 source. Electrons stored in a dot results in an observed discrete threshold shift of 90 mV. Analysis of lifetime as a function of applied potential and temperature show the dot to be an acceptor site with nearly Poisson lifetime distributions. An observed 1/T2 dependence of lifetime is consistent with a direct tunneling process, thus interface states are not the dominant mechanism for electron storage in this device structure. Median lifetimes are modeled by a direct tunneling process, which is influenced by gate bias and dot size.

Type
Research Article
Copyright
Copyright © Materials Research Society 2001

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