The current leakage generated in a localized area that creates a more serious problem to the ULSI devices was investigated. To clarify the origin of such a current leakage generated at a localized small area, an evaluation technique with a high spatial resolution, high sensitivity and a precise positioning is demanded. We have developed the planar point TEM(Transmission Electron Microscope) technique to enable the structure analysis of a localized small area in ULSI devices. Using this technique and AEM(Analytical Electron Microscope), we revealed one cause of current leakage at a small area in a memory device. It was found that one origin of such leakage is caused by heavy metal precipitation on the localized dislocation. The origin of this dislocation generation is a combination of effects from the crystalline damage during the formation of the oxide sidewall spacer by dry etching and the stresses from the oxide sidewall spacer and the field oxide.