Back-end interconnect structures (BEIS) of micro-electronic devices are susceptible to several deformation phenomena during thermal excursions, because of large differences in thermal expansion coefficients (CTE) between Si, interlayer dielectric (ILD) and metal lines. Here we use atomic force microscopy (AFM) to study plastic deformation and interfacial sliding of Cu interconnect lines on embedded in a low K dielectric (LKD). Following thermal cycling, changes were observed in both inplane Cu line dimensions, as well as out-of plane step height between Cu and LKD in single layer structures. The results of AFM measurements following both ex-situ and in-situ thermal cycling presented. A shear-lag based model is utilized to simulate the thermal cycling response, and rationalize the observed interfacial sliding behavior. Results of in-situ AFM experiments to observe the deformation of Cu-low K interconnect structures under far-field (i.e., package-level) stresses are also presented.