Hostname: page-component-cd9895bd7-7cvxr Total loading time: 0 Render date: 2024-12-26T20:15:47.284Z Has data issue: false hasContentIssue false

Performance and Reliability of Thick Cu Interconnects for RF and Analog/Mixed Signal Technology

Published online by Cambridge University Press:  29 May 2013

E. Cooney
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
J.P. Gambino
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
F. Anderson
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
J. He
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
T. Lee
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
E. White
Affiliation:
IBM Microelectronics, 1000 River Street, Essex Junction, VT, 05452
X. Liu
Affiliation:
IBM T.J. Watson Research Center, Yorktown Heights, NY 10598
C. Cabral Jr
Affiliation:
IBM T.J. Watson Research Center, Yorktown Heights, NY 10598
T. Shaw
Affiliation:
IBM T.J. Watson Research Center, Yorktown Heights, NY 10598
Get access

Abstract

Wireless communications such as those in cell phones are utilizing increasing chip design complexity. For example analog mixed-signal chips can contain RF capability which requires integrated inductors [1,2]. High performance RF designs are enabled by the use of thick Copper (Cu) and Aluminum (Al) wires (>3um). In particular, the quality factor of the inductor, which is the ratio of magnetic stored energy over average dissipation, is dependent on the metal thickness. High quality factors, can be achieved by using thick Cu inductors. In some applications, the total thickness of Cu in the inductor can be as much as 12 um.

The fabrication of thick Cu layers is in many ways easier than that of thin Cu layers. For example, there are no limitations in terms of lithography or liner and seed layer thickness. However, there are still challenges with fabrication due to stress. Cracking of the dielectric can occur, due to the mismatch in coefficient of thermal expansion between Cu and SiO2, and due to the thick Cu layers in the inductor stack. Both the layout and the processing must be optimized to ensure that cracking does not occur.

This paper will discuss current applications, inductor design, and the reliability challenges and solutions associated with thick Cu interconnects.

Type
Articles
Copyright
Copyright © Materials Research Society 2013 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

Edelstein, D.C., Burghartz, J.N., IITC Proc., 1998, pp. 1820 Google Scholar
Gambino, J.P., Anderson, JF., Cooney, E., He, J., Bolam, R., Webb, B.C., Cabral, C., Shaw, T., Vanslette, D., IEEE IPFA Proc., 2011.Google Scholar
Joseph, A., Gammel, P., Rabbeni, P., Wolf, R., Dunn, J., “Silicon Solutions for RF Front-End Applications”, IEEE SiRF Proc., 2011, p. 109112.Google Scholar
Zampardi, P.J., “Will CMOS Amplifiers Ever Kick-GaAs?”, IEEE CICC Proc., 2010, p. 14.Google Scholar
Joseph, A., Harame, D.L., Jagannathan, B., Coolbaugh, D., Ahlgren, D., Magerlein, J., Onge, S. St., Lanzerotti, L., Feilchenfeld, N.,, Dunn, J., Nowak, E., “Status and Direction of Communication Technologies”–SiGe BiCMOS and RFCMOS”, Proc. IEEE, 2005, p. 15391558.CrossRefGoogle Scholar
Botula, A., Joseph, A., Slinkman, J., Wolf, R., He, Z.-X., Ioannu, D., Wagner, L., Gordon, M., Abou-Khalil, M., Phelps, R., Gautsch, M., Abadeer, W., Harmon, D., Levy, M., Benoit, J., Dunn, J., “A Thin-film SOI 180nm CMOS RF Switch Technology”, IEEE SiRF Proc., 2009, p. 14.Google Scholar
Dunn, J.S., Ahlgren, D.C., Coolbaugh, D.D., Feilchenfeld, N.B., Freeman, G., Greenberg, D.R., Groves, R.A., Guarín, F.J., Hammad, Y., Joseph, A.J., Lanzerotti, L.D., Onge, S.A. St., Orner, B.A., Rieh, J.-S., Stein, K.J., Voldman, S.H., Wang, P.-C., Zierak, M.J., Subbanna, S., Harame, D.L., Herman, D.A. Jr., Meyerson, B.S., Bernard, S., “Foundation of rf CMOS and SiGe BiCMOS technologies”, IBM J. Res. Dev., vol. 47, pp. 101137, 2003.CrossRefGoogle Scholar
Harame, D., Joseph, A., Coolbaugh, D., Freeman, G., Newton, K., Parker, S.M., Groves, R., Ertuk, M., Stein, K., Volant, R., Dickey, C., Dunn, J., Subbanna, S., Zamat, H., Marangos, V.S., Doherty, M.M., Herman, D.A., Meyerson, B.S., “The emerging role of SiGe BiCMOS technology in wired and wireless communications”, Proc. IEEE Conf. Devices, Circuits, and Systems, 2002, p. D052.Google Scholar
Chen, C.H., Chang, C.S., Chao, C.P., Kuan, J.F., Chang, C.L., Wang, S.H., Hsu, H.M., Lien, W.Y., Tsai, Y.C., Lin, H.C., Wu, C.C., Huang, C.F., Chen, S.M., Tseng, P.M., Chen, C.W., Ku, C.C., Lin, T.Y., Chang, C.F., Lin, H.J., Tsai, M.R., Chen, S., Chen, C.F., Wei, M.Y., Wang, Y.J., Lin, J.C.H., Chen, W.M., Chang, C.C., King, M.C., Huang, C.M., Lin, C.T., Guo, J.C., Chern, G.J., Tang, D.D., Sun, J.Y.C., “A 90 nm CMOS MS/RF based foundry SOC technology comprising superb 185 GHz fT RFMOS and versatile, high-Q passive components for cost/performance optimization “, IEDM Proc., 2003, pp3942.Google Scholar
Stamper, A.K., Chinhakindi, A.K., Coolbaugh, D.D., Downes, K., Eshun, E.E., Ertuk, M., He, Z.-X., Groves, R.A., Lindgren, P., Ramachandran, V., “Advanced analog metal and passives integration”, Proc. AMC 2004, MRS 2005, pp. 3743.Google Scholar
Gambino, J., Chen, F., He, J., “Copper interconnect technlogy for 32 nm node and beyond”, IEEE CICC Proc., 2009, p. 141.Google Scholar
Harame, D., Joseph, A., Coolbaugh, D., Freeman, G., Newton, K., Parker, S.M., Groves, R., Ertuk, M., Stein, K., Volant, R., Dickey, C., Dunn, J., Subbanna, S., Zamat, H., Marangos, V.S., Doherty, M.M., Herman, D.A., Meyerson, B.S., “The emerging role of SiGe BiCMOS technology in wired and wireless communications”, Proc. IEEE Conf. Devices, Circuits, and Systems, 2002, p. D052–1 –; D052–17.Google Scholar
Burghartz, J.N., Rejaei, B., Schelllevis, H., “Saddle Add-on Metallization for RF-IC Technology”, IEEE Trans. Elec. Dev., 51, 2004, p. 460466.CrossRefGoogle Scholar
Kasim, R., Connor, C., Hicks, J., Jopling, J., Litteken, C., “Reliability for Manufacturing on 45nm Logic Technology with High-k + Metal Gate Transistors and Pb-free Packaging”, IEEE IRPS Proc., 2009, p. 350354.Google Scholar
Gambino, J., Cooney, E., Anderson, F., He, J., Mosher, D., Cabral, C. Jr, Shaw, T., “Stress effects in Cu interconnects for RF technology”, Presented at Spring MRS 2012 Google Scholar