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A Low Temperature Single-Step RTA Process to form Ultrathin CoSi2 for Mosfet Applications

Published online by Cambridge University Press:  15 February 2011

Melanie J. Sherony
Affiliation:
Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139
T. S. Sriram
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
Craig England
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
Aldo Pelillo
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
William C. Harris
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
Stephen J. Miller
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
Steven A. Bill
Affiliation:
Digital Equipment Corporation, Hudson, MA 01749
Isabel Y. Yang
Affiliation:
Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139
Andy Wei
Affiliation:
Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139
Dimitri A. Antoniadis
Affiliation:
Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02139
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Abstract

A single-step, low temperature self-aligned CoSi2 process using Ti/Co source material has been developed for use in extreme submicrometer MOSFET applications. Ultra-thin CoSi2 films (∼ 20 nm) were obtained from a single-step RTA anneal at 550°C for 30 sec using Ti/Co source material on patterned n+ implanted (100) Si. X-ray diffraction was used to verify CoSi2 formation. Highresolution SEM and TEM examination showed the silicide to be microstructurally smooth and the devices showed no lateral growth of the silicide at the polysilicon spacer edge. Some voiding and lateral overgrowth was observed at the LOCOS isolation edge and this effect was exacerbated at higher anneal temperatures. This single-step low temperature CoSi2 process is a promising technology for deep-submicron MOSFET applications.

Type
Research Article
Copyright
Copyright © Materials Research Society 1996

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References

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