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High-Density, Low-loss MOS Decoupling Capacitors integrated in a GSM Power Amplifier

Published online by Cambridge University Press:  01 February 2011

F. Roozeboom
Affiliation:
Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands
A. Kemmeren
Affiliation:
Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands
J. Verhoeven
Affiliation:
Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands
E. van den Heuvel
Affiliation:
Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands
H. Kretschman
Affiliation:
Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands
T. Frič
Affiliation:
Philips Semiconductors, Gerstweg 2, 6534 AE Nijmegen, The Netherlands
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Abstract

High-density MOS capacitors have been fabricated with ∼ 30 nF/mm2 specific capacitance on highly-doped Si-wafers with arrays of macropores with ∼ 2 μm diameter. Using the Bosch process [1] these pores were dry-etched to depths of ∼ 30 μm or more. The enlarged Si-surface thus obtained serves as a substrate for capacitors fabricated by fully MOS-compatible processing.

Wafers were fabricated with a top electrode of poly-Si and Al and ‘ONO’ (i.e. oxide / nitride / oxide) dielectric stacks showing 7–10 MV/cm electrical breakdown field and leakage < 1 nA/mm2 @ 20 V. These wafers were thinned to 380 μm and sawn into dies, representing 40 nF capacitors. Typically low loss factors such as ESR < 50 mΩ and ESL < 20 pH and resonance frequencies of ∼ 0.1 GHz were found for 40 nF capacitor dies. Next, 40 nF dies were mounted by wire bonding on Al2O3 or laminate substrate as supply-line decoupling capacitors in complete GSM power amplifier test modules. RF decoupling and transmission were measured and compared to identical test modules with conventional discrete ceramic capacitors. The MOS capacitors showed very efficient decoupling, resulting in superior signal stability as measured in the 0 – 1 GHz range (less noisy, free from oscillations).

The new capacitor is very suitable for integrated decoupling purposes, e.g. supply-line decoupling in RF wireless communication and analog and mixed-signal systems.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

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References

1. Lärmer, F. and Schilp, A., “Method of anisotropically etching silicon”, US Patent 5,501,893, March 26, 1996.Google Scholar
2. Roozeboom, F., Elfrink, R., Rijks, T., Verhoeven, J., Kemmeren, A. and van den Meerakker, J., Int. J. Microcircuits and Electronic Packaging, 24 (3) (2001) pp. 182196, and refs. therein.Google Scholar

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