Hostname: page-component-77c89778f8-rkxrd Total loading time: 0 Render date: 2024-07-22T01:43:17.668Z Has data issue: false hasContentIssue false

Erbium-Silicided Source/Drain Junction Formation by Rapid Thermal Annealing Technique for Decananometer-Scale Schottky Barrier Metal-Oxide-Semiconductor Field- Effect Transistors

Published online by Cambridge University Press:  17 March 2011

Moongyu Jang
Affiliation:
Future Technology Research Division, Electronics and Telecommunication Research Institute, Daejon, 305-350, Korea
Yarkyeon Kim
Affiliation:
Future Technology Research Division, Electronics and Telecommunication Research Institute, Daejon, 305-350, Korea
Jaeheon Shin
Affiliation:
Future Technology Research Division, Electronics and Telecommunication Research Institute, Daejon, 305-350, Korea
Kyoungwan Park
Affiliation:
Department of Nano Science and Technology, University of Seoul, Seoul, 130-743, Korea
Seongjae Lee
Affiliation:
Future Technology Research Division, Electronics and Telecommunication Research Institute, Daejon, 305-350, Korea
Get access

Abstract

The stable growth conditions of erbium-silicide on silicon-on-insulator (SOI) are investigated considering annealing temperature, SOI and sputtered erbium thickness. From the sheet resistance measurement, X-ray diffraction and Auger electron spectroscopy analysis, the optimum annealing temperature is determined as 500°C. Also, for the stable growth of erbium- silicide on SOI, the sputtered erbium thickness should be less than 1.5 times of SOI thickness. As the SOI thickness decreases below this critical thickness, erbium-rich region is formed at the erbium-silicide and buried-oxide interface. By applying the optimized erbium-silicide growth conditions, 50-nm-gate-length n-type SB-MOSFET is manufactured, which shows the possible usage of erbium-silicide as the source and drain material in the n-type Schottky barrier MOSFETs for decananometer regime applications.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Jang, M., Kim, Y., Shin, J., Park, K. and Lee, S., Appl. Phys. Lett. 84, 741 (2004).Google Scholar
2. Choi, Y. K., Ha, D., King, T. J., and Bokor, J., Jpn. J. Appl. Phys. 42, 2073 (2003).Google Scholar
3. Lin, H. C., Wang, M. F., Hou, F. J., Lin, H. N., Lu, C. Y., Liu, J. T., and Huang, T. Y., IEEE Trans. Electron Devices Lett. 24, 102 (2003).Google Scholar
4. Calvet, L. E., Luebben, H., Reed, M. A., Wang, C., Snyder, J. P., and Tucker, J. R., J. Appl. Phys. 91, 757 (2002).Google Scholar
5. Kedzierski, J., Xuan, P., Erik Anderson, H., Bokor, J., King, T. J., and Hu, C., Tech. Dig. – Int. Electron Devices Meet. 2000, 57 (2000).Google Scholar
6. Zhang, X. W., Wong, S. P., and Cheung, W. Y., J. Appl. Phys. 94, 157 (2003).Google Scholar
7. Knapp, J. A., Picraux, S. T., Wu, C. S., and Lau, S. S., J. Appl. Phys. 58, 3747 (1985).Google Scholar
8. Wu, C. S., Scott, D. M., and Lau, S. S. J. Appl. Phys. 58, 1330 (1985).Google Scholar