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Dry Etch Self-Aligned AlInAs/InGaAs Heterojunction Bipolar Transistors

Published online by Cambridge University Press:  26 February 2011

T. R. Fullowan
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
S. J. Pearton
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
R. F. Kopf
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
F. Ren
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
Y. K. Chen
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
P. R. Smith
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
M. A. Chin
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
J. Lothian
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
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Abstract

A dry etch fabrication technology for high-speed AlInAs/InGaAs Heterojunction Bipolar Transistors (HBT's) utilizing low-damage Electron Cyclotron Resonance (ECR) CH4/H2/Ar plasma etching is detailed. The dry etch process uses triple self-alignment of the emitter and base metals and the base mesa, minimizing the base-collector capacitance (CBC). Devices with 2 × 4 μm2 emitters demonstrated current gains of 30–50 with ft and fmax values of ≥ 80 GHz and ≥100 GHz respectively. The structure employs a two-stage collector to achieve breakdown voltage (Vceo ) of 7V. The combination of processing and layer structure delivers truly scalable high yield AlInAs/InGaAs HBT's with both DC and RF characteristics suitable for large-scale, high speed digital circuit applications.

Type
Research Article
Copyright
Copyright © Materials Research Society 1992

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References

[1] Jalali, B., Nottenburg, R. N., Chen, Y. K., Sivco, D., Humphrey, D. A. and Cho, A. Y., “High Frequency Submicrometer AlInAs/InGaAs Heterojunction Bipolar TransistorsIEEE Electron Dev. Lett. 1989, 10 pp. 391393.CrossRefGoogle Scholar
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