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MRS Online Proceedings Library (OPL) MRS Online Proceedings Library (OPL)

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Control of Si-SiO2 Interface Properties in MOS Devices Prepared by Plasma-Assisted and Rapid Thermal Processes

Published online by Cambridge University Press:  21 February 2011

G. Lucovsky ,
T. Yasuda ,
Y. Ma ,
S.V. Hattangady ,
X-L Xu ,
V. Misra ,
B. Hornung  and
J.J. Wortman
G. Lucovsky
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
T. Yasuda
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
Y. Ma
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
S.V. Hattangady
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
X-L Xu
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
V. Misra
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
B. Hornung
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
J.J. Wortman
Affiliation:
Departments of Physics, Materials Science and Engineering, and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202, USA
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Abstract

This paper describes the preparation of silicon-based metal oxide semiconductor, MOS, devices, capacitors and field effect transistors, FETs, using deposited oxide dielectrics. A critical aspect of the device fabrication process is the way the Si-SiO2 interface is formed; e.g., either before, during, or after the oxide deposition. We have studied different methods of fabricating Si-SiO2 heterostructures, and have concluded that the implementation of independently controllable and sequential process steps for (i) interface formation, and (ii) oxide deposition consistently yields MOS devices with electrical properties that are superior to those of devices fabricated under other processing conditions which include specifically interface formation during the oxide deposition.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 318: Symposium Ca – Interface Control of Electrical, Chemical, and Mechanical Properties , 1993 , 81
Copyright
Copyright © Materials Research Society 1994

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References

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