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Application of Two-Step Deposition Method To Ultra-Thin a-Si FETs

Published online by Cambridge University Press:  28 February 2011

Y. Katoh
Affiliation:
Department of Electrical and Electronic Engineering Tokyo Institute of Technology, Meguro-ku, Tokyo 152, JAPAN
O. Sugiura
Affiliation:
Department of Electrical and Electronic Engineering Tokyo Institute of Technology, Meguro-ku, Tokyo 152, JAPAN
Y. Takeuchi
Affiliation:
Department of Electrical and Electronic Engineering Tokyo Institute of Technology, Meguro-ku, Tokyo 152, JAPAN
Y. Uchida
Affiliation:
Department of Electrical and Electronic Engineering Tokyo Institute of Technology, Meguro-ku, Tokyo 152, JAPAN
M. Matsumura
Affiliation:
Department of Electrical and Electronic Engineering Tokyo Institute of Technology, Meguro-ku, Tokyo 152, JAPAN
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Abstract

Two-step deposition method for fabricating ultra-thin a-Si FETs has been investigated theoretically and experimentally. Theoretical relation between field-effect mobility and a-Si layer thickness agreed qualitatively with the experimental results. The mobility of the 15nm-thick FET was drastically improved by an application of the two-step deposition method.

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Articles
Copyright
Copyright © Materials Research Society 1986

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References

1) Matsumura, M.: Digest of Technical Papers of the 11th Amorphous Seminar, Tokyo, 1984, p. 9 [In Japanese].Google Scholar
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