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Sample Preparation Challenges in Advanced Semiconductor Test Structures

Published online by Cambridge University Press:  05 August 2019

James J. Demarest ,
Lukas Tierney ,
Yinggang Lu  and
Katharine Dovidenko
James J. Demarest
Affiliation:
IBM @ Albany Nanotech, Albany, NY, USA
Lukas Tierney
Affiliation:
IBM @ Albany Nanotech, Albany, NY, USA
Yinggang Lu
Affiliation:
Thermo Fisher Scientific, Hillsboro, OR, USA
Katharine Dovidenko
Affiliation:
Thermo Fisher Scientific, Hillsboro, OR, USA

Abstract

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Type
Microscopy and Microanalysis for Real-World Problem Solving
Information
Microscopy and Microanalysis , Volume 25 , Supplement S2 , August 2019 , pp. 684 - 685
Copyright
Copyright © Microscopy Society of America 2019 

References

[1]Demarest, J. et al. , Proceedings from the 37th International Symposium for Testing and Failure Analysis (2013) p. 544.Google Scholar
[2]Loubet, N. et al. , 2017 Symposium on VLSI Technology (2017) p. T230.Google Scholar
[3]Demarest, J. and DeSouza, Z., Proceedings from the 33rd International Symposium for Testing and Failure Analysis (2009) p. 334.Google Scholar