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Transmission lines characteristic impedance versus Q-factor in CMOS technology

Published online by Cambridge University Press:  20 April 2021

Johannes J.P. Venter*
Affiliation:
Department for Electrical, Electronic, and Computer Engineering, Carl and Emily Fuchs Institute for Microelectronics, University of Pretoria, Pretoria, South Africa
Anne-Laure Franc
Affiliation:
LAPLACE, University of Toulouse, CNRS, INPT, UPS, Toulouse, France
Tinus Stander
Affiliation:
Department for Electrical, Electronic, and Computer Engineering, Carl and Emily Fuchs Institute for Microelectronics, University of Pretoria, Pretoria, South Africa
Philippe Ferrari
Affiliation:
RFIC-Lab, University of Grenoble Alpes, Grenoble, France
*
Author for correspondence: Johannes J.P. Venter, E-mail: venter.jjp@tuks.co.za

Abstract

This paper presents a systematic comparison of the relationship between transmission line characteristic impedance and Q-factor of CPW, slow-wave CPW, microstrip, and slow-wave microstrip in the same CMOS back-end-of-line process. It is found that the characteristic impedance for optimal Q-factor depends on the ground-to-ground spacing of the slow-wave transmission line. Although the media are shown to be similar from a mode of propagation point of view, the 60-GHz optimal Q-factor for slow-wave transmission lines is achieved when the characteristic impedance is ≈23 Ω for slow-wave CPWs and ≈43 Ω for slow-wave microstrip lines, with Q-factor increasing for wider ground plane gaps. Moreover, it is shown that slow-wave CPW is found to have a 12% higher optimal Q-factor than slow-wave microstrip for a similar chip area. The data presented here may be used in selecting Z0 values for S-MS and S-CPW passives in CMOS that maximize transmission line Q-factors.

Type
Passive Components and Circuits
Copyright
Copyright © The Author(s), 2021. Published by Cambridge University Press in association with the European Microwave Association

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