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Design and model studies for solid-state power amplification at 210 GHz

Published online by Cambridge University Press:  19 April 2011

Sebastian Diebold*
Affiliation:
Karlsruhe Institute of Technology (KIT), Kaiserstrasse 12, D-76131 Karlsruhe, Germany.
Ingmar Kallfass
Affiliation:
Karlsruhe Institute of Technology (KIT), Kaiserstrasse 12, D-76131 Karlsruhe, Germany. Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
Hermann Massler
Affiliation:
Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
Matthias Seelmann-Eggebert
Affiliation:
Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
Arnulf Leuther
Affiliation:
Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
Axel Tessmann
Affiliation:
Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
Philipp Pahl
Affiliation:
Karlsruhe Institute of Technology (KIT), Kaiserstrasse 12, D-76131 Karlsruhe, Germany.
Stefan Koch
Affiliation:
Sony Deutschland GmbH, Sensing Systems Laboratory, Hedelfinger Strasse 61, D-70327 Stuttgart, Germany.
Oliver Ambacher
Affiliation:
Fraunhofer Institute for Applied Solid-State Physics (IAF), Tullastrasse 72, D-79108 Freiburg, Germany.
*
Corresponding author: S. Diebold Email: Sebastian.Diebold@kit.edu

Abstract

The high millimeter-wave (mmW) frequency range offers new possibilities for high-resolution imaging and sensing as well as for high data rate wireless communication systems. The use of power amplifiers of such systems boosts the performance in terms of operating range and/or data rate. To date, however, the design of solid-state power amplifiers at frequencies about 210 GHz suffers from limited transistor model accuracy, resulting in significant deviation of simulation and measurement. This causes cost and time consuming re-design iterations, and it obstructs the possibility of design optimization ultimately leading to moderate results. For verification of the small-signal behavior of our in-house large-signal transistor model, S-parameter measurements were taken from DC to 220 GHz on pre-matched transistors. The large-signal behavior of the transistor models was verified by power measurements at 210 GHz. After model modification, based on process control monitor (PCM) measurement data, the large-signal model was found to match the measurements well. A transistor model was designed containing the statistical information of the PCM data. This allows for non-linear spread analysis and reliable load-pull simulations for obtaining the highest available circuit performance. An experimental determination of the most suitable transistor geometry (i.e. number of gate fingers and gate width) and transistor bias was taken on 100 nm gate length metamorphic high electron mobility transistor (mHEMT) transistors. The most suitable combination of number of fingers, gate width and bias for obtaining maximum gain, maximum output power, and maximum power added efficiency (PAE) at a given frequency was determined.

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2011

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References

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